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Chip Select for SPIM0

Hello,

I'm currently using SDK 17.0.2 with NRF52840. We have our SPIM3 device up and running nicely. I'm now de-risking our SPIM0 device and noticed that chip select isn't the same as in SPIM3. Can you confirm the following:

1) Is chip select handled manually with a gpio_write() call?

2) Which function do we use for SPIM0/1/2? x

nrfx_spim_xfer_dcx() or nrfx_spim_xfer()

Thank you.
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  • Hello,

    I'm now de-risking our SPIM0 device and noticed that chip select isn't the same as in SPIM3.

    What do you mean when you say that it is not the same as in SPIM3?
    Are you initializing it in the same way, but it behaves differently? If so, please elaborate how it is behaving differently. Or do you mean that you would like the CS pin to be the same CS pin as the SPIM3 is using already?

    1) Is chip select handled manually with a gpio_write() call?

    No, if you have defined the CS pin as part of the instance's initialization the driver will take care of the CS pin handling.

    The CSN pin on instances SPIM0, 1, and 2 does not support hardware control, so they must indeed be set and cleared using the GPIO functions separately. Please see my following comment for more information about this.

    nrfx_spim_xfer_dcx() or nrfx_spim_xfer()

    That depends if you intend to use dcx control or not. The normal SPI operation would be to use nrfx_spim_xfer.

    Best regards,
    Karl

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  • Hello,

    I'm now de-risking our SPIM0 device and noticed that chip select isn't the same as in SPIM3.

    What do you mean when you say that it is not the same as in SPIM3?
    Are you initializing it in the same way, but it behaves differently? If so, please elaborate how it is behaving differently. Or do you mean that you would like the CS pin to be the same CS pin as the SPIM3 is using already?

    1) Is chip select handled manually with a gpio_write() call?

    No, if you have defined the CS pin as part of the instance's initialization the driver will take care of the CS pin handling.

    The CSN pin on instances SPIM0, 1, and 2 does not support hardware control, so they must indeed be set and cleared using the GPIO functions separately. Please see my following comment for more information about this.

    nrfx_spim_xfer_dcx() or nrfx_spim_xfer()

    That depends if you intend to use dcx control or not. The normal SPI operation would be to use nrfx_spim_xfer.

    Best regards,
    Karl

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