nRF52810 pin hardware architecture

[gschelotto]

Hi,

I'd need some information I'm not able to find in product specification v1.3:

• What is the architecture of the GPIO / AN pins of this device? Input protection diodes, pull-up/down, output open drain, push-pull, etc
• What is the state of the all pins during the power-up? For example pin4 of QFN48 package is a digital or an analog input?
  
• Can I configure any digital pin as MISO, MOSI, SCLK or CS?

thanks in advance,
gaston

[ketiljo]

What is the architecture of the GPIO / AN pins of this device? Input protection diodes, pull-up/down, output open drain, push-pull, etc

All pins have ESD protection diodes. All pins can have pull-up/down. Output is push-pull only

What is the state of the all pins during the power-up? For example pin4 of QFN48 package is a digital or an analog input?

During power up, all pins are disconnected, i.e. high Z.

Can I configure any digital pin as MISO, MOSI, SCLK or CS?

You can configure the digital interfaces to any pin. Only the analog inputs are fixed.

 

 

[Dmitry]

ketiljo said:

Output is push-pull only

AFAIK, open-drain configurations can be used as well (either P or N MOSFETs can be disconnected)

[ketiljo]

Yes, you're correct!