Adding more nrf9160 PWM channels.

[Caio Dias]

Hello DevZoners, I hope you are all doing great!

I'm struggling to understand how this works.

I've been following the NCS Tutorial part 2 to implement the PWM peripheral in 9160's chip (I have an nrf9160dk), and when I try to implement more than one channel pin using the same PWM instance, it does not work. 

&pwm0 {
    status = "okay";
	ch0-pin = < 2 >;
    ch1-pin = < 3 >;
};

#include <zephyr.h>
#include <sys/printk.h>
#include <drivers/pwm.h>

#define PWM_DEVICE_NAME DT_PROP(DT_NODELABEL(pwm0), label)
#define PWM_CH0_PIN DT_PROP(DT_NODELABEL(pwm0), ch0_pin)

#define PWM1_DEVICE_NAME DT_PROP(DT_NODELABEL(pwm0), label)
#define PWM1_CH0_PIN DT_PROP(DT_NODELABEL(pwm0), ch1_pin)


#define PWM_PERIOD 253

void main(void)
{
	printk("PWM Application has started!\r\n");
	uint8_t pulse = 0;
	const struct device *pwm_dev = device_get_binding(PWM_DEVICE_NAME);
	if (!pwm_dev) {
		printk("Cannot find %s!\n", PWM_DEVICE_NAME);
		return;
	}

        const struct device *pwm_dev1 = device_get_binding(PWM1_DEVICE_NAME);
	if (!pwm_dev1) {
		printk("Cannot find %s!\n", PWM1_DEVICE_NAME);
		return;
	}

        while (1)
        {                
                pulse = pulse +10;
                if (pulse > PWM_PERIOD) {
					pulse = 0;
                }
                if (pwm_pin_set_usec(pwm_dev, PWM_CH0_PIN, PWM_PERIOD, pulse, 0)) {
					printk(".");
                }
                if (pwm_pin_set_usec(pwm_dev1, PWM1_CH0_PIN, PWM_PERIOD, pulse, 0)) {
					printk(".");
                }
                k_sleep(K_MSEC(30));
        }
}

For example, using the .overlay file and the code shown for the 9160DK and turn to the following error:

'DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_pin' undeclared (first use in this function); did you mean 'DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_pin'?

According to NCS tutorial, "The ch0-pin field is then transformed into the define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_ch0_pin inside <...>\light_controller\build\zephyr\include\generated\devicetree_unfixed.h and used by the driver pwm_nrfx.c through PWM_NRFX_OUTPUT_PIN()→PWM_NRFX_CH_PIN()."

Isn't supposed to make this automatically when I add more channels in the overlay file and the C code? Is this because the NCS version? I'm using the 1.6.1v and the 2.6.0v of Zephyr.

Obs: when I build this exact same code, but change the overlay file for the nrf52840DK it works.

[Kazi Afroza Sultana]

Hello Caio Rafael,

Thanks for your query.

Could you please share your .dts file (<sample>/build/zephyr/zephyr.dts) ? 

Also the latest tutorial is based on v1.5.0, so if that isn't used, problems might show up.

Best Regards,

Kazi Afroza Sultana

[Caio Dias]

Hello Kazi Sultana, 

Thank you for your reply. 

I took so long to send this because I was investigating for myself, and I apologize.

However, I found some findings, and I'd like to share them. 

- I didn't send the zephyr.dts because my code gave an error in the image below and does not build.

Looking into the devicetree_unfixed.h file, I had to add a couple of lines to each pin that I needed to use.

devicetree_unfixed.h before:

/*
 * Devicetree node: /soc/peripheral@40000000/pwm@21000
 *
 * Node identifier: DT_N_S_soc_S_peripheral_40000000_S_pwm_21000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_PATH "/soc/peripheral@40000000/pwm@21000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_FULL_NAME "pwm@21000"

/* Node parent (/soc/peripheral@40000000) identifier: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_PARENT DT_N_S_soc_S_peripheral_40000000
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_ORD 23

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REQUIRES_ORDS \
	5, /* /soc/peripheral@40000000 */ \
	22, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_SUPPORTS_ORDS \
	24, /* /pwmleds/pwm_led_0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_peripheral_40000000_S_pwm_21000
#define DT_N_NODELABEL_pwm0        DT_N_S_soc_S_peripheral_40000000_S_pwm_21000

/* Special property macros: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_NUM 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_IDX_0_VAL_ADDRESS 1073876992 /* 0x40021000 */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_NUM 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_irq 33
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg {135168 /* 0x21000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_0 135168
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, reg, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, reg, 1)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_center_aligned 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_pin 2
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_pin_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch2_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch3_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_label "PWM_0"
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 1) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 2) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 3) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 4)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_label_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status "okay"
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 1) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 2) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 3)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, compatible, 0)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_LEN 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts {33 /* 0x21 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_0 33
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, interrupts, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, interrupts, 1)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_EXISTS 1

and the devicetree_unfixed.h after:

/*
 * Devicetree node: /soc/peripheral@40000000/pwm@21000
 *
 * Node identifier: DT_N_S_soc_S_peripheral_40000000_S_pwm_21000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_PATH "/soc/peripheral@40000000/pwm@21000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_FULL_NAME "pwm@21000"

/* Node parent (/soc/peripheral@40000000) identifier: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_PARENT DT_N_S_soc_S_peripheral_40000000
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_ORD 23

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REQUIRES_ORDS \
	5, /* /soc/peripheral@40000000 */ \
	22, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_SUPPORTS_ORDS \
	24, /* /pwmleds/pwm_led_0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_peripheral_40000000_S_pwm_21000
#define DT_N_NODELABEL_pwm0        DT_N_S_soc_S_peripheral_40000000_S_pwm_21000

/* Special property macros: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_NUM 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_IDX_0_VAL_ADDRESS 1073876992 /* 0x40021000 */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_NUM 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_irq 33
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg {135168 /* 0x21000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_0 135168
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, reg, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, reg, 1)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_reg_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_center_aligned 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_pin 2
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_pin_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_pin 3
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_pin_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch2_pin 4
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch2_pin_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch2_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch3_pin 5
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch3_pin_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch3_inverted 0
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_label "PWM_0"
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 1) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 2) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 3) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, label, 4)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_label_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status "okay"
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 1) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 2) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, status, 3)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_status_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, compatible, 0)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_LEN 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts {33 /* 0x21 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_0 33
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, interrupts, 0) \
	fn(DT_N_S_soc_S_peripheral_40000000_S_pwm_21000, interrupts, 1)
#define DT_N_S_soc_S_peripheral_40000000_S_pwm_21000_P_interrupts_EXISTS 1

After this, the code runs and works as expected.

Even with this fix, I still have questions:

1º Wasn't this fix supposed to happen automatically when the overlay file is configured correctly? I still don't understand how this could happen; I have attached the zephyr.dts here, perhaps you can explain why this occurs.

0250.zephyr.dts

2º Checking the nRF9160's datasheet, assigning up to four pins to each PWM's instance is possible. I tested this, and it works, but I need five pins to control five LED drivers. To do that, it is needed two PWM instances active at the same, such as PWM_0 and PWM_1. Is this possible? or does hardware limit it, and is one instance active at the time? 

3º In case it is limited by the hardware, is there an alternative to have PWM in the fifth pin?

Best regards,

Caio.

[Kazi Afroza Sultana]

Hello Caio,

Good day. Thanks for your queries. here are the answers below:

1. In your zephyr.dts file there is no ch-1 pin under pwm0 instance. That is the reason of falling. Our team has tested by building zephyr/samples/hello_world(NCS v1.6.1) and added nrf9160dk_nrf9160ns.overlay with the following content 

&pwm0 {
status = "okay";
ch0-pin = < 2 >;
ch1-pin = < 3 >;
};

Then built it with west build -b nrf9160dk_nrf9160ns and found ch1-pin under the pwm0 node inside the file build/zephyr/zephyr.dts. You can make sure to set the same name to the overlay file as the one is used to built with. 

2. Yes it is possible. You can set 4 pins from PWM0 and one pin from PWM1. 

3. No. Maximum 4 pins for each instances.

https://infocenter.nordicsemi.com/topic/ps_nrf9160/pwm.html
" Up to four PWM channels with individual polarity and duty cycle values"

You can let us know the consequence of your number one query by adding ch-1 under your PWM0 instance.

Best Regards,

Kazi Afroza Sultana