NRF52840 QSPI IFTIMING Problem

[Bing]

Dear,

We are working on our custom boards to develop a watch product which need external flash memory connected by QSPI interface. In this product, the UI images and font bitmaps store in the external memory. We found the screen of some watch samples display noise content(the data source comes from the external flash memory).  We tried to change IFTIMING register value, and we found the problem watches display problem been fixed. But some other watches no need to change the default value of IFTIMING (the default whole register value 0x00000200). The proportion of problem products is about 6%. 

We want to know why the problem products can fix this issue by change IFTIMING register while some most of the product (the other 96%) no need to change this register. And whether the IFTIMING register change would lead other unknown issues.

The following is my understanding about IFTIMING, seems the default value is not fit the the CLOCK mode=0 (CPOL=0, CPHA=0) with the QSPI clock=32MHz.

Our the external flash memory is XT25F128BWOIGT.

[haakonsh]

We want to know why the problem products can fix this issue by change IFTIMING register while some most of the product (the other 96%) no need to change this register. And whether the IFTIMING register change would lead other unknown issues.

I don't know why you see this issue exactly. I suggest we do a HW review to see if there is any obvious signal integrity issues in the design. 
We don't know if changing the timings will lead to unknow problems in your design. 

If you change the IFTIMING of the 'good' devices, does it have a negative impact, or do they continue to function as intended?

[you can123]

I just discovered some interesting phenomena. When I reduce the power supply of the MCU from 3.3V to 3V, QSPI will become normal, and when I add a measurement line to the Clock pin, QSPI will also become Normally, this caused me to be unable to use the logic analyzer to view the timing. And when we heat NRF52840 with an air gun, this error phenomenon will also disappear.

[haakonsh]

Have you enabled the High drive strength(H0H1) for the qspi gpio's ?

[you can123]

Yes

[haakonsh]

Then my recommendation is to either reduce the speed to 16MHz, or change the IFTIMINGs for all of your devices.

[you can123]

After changing the IFTIMING, some equipment is normal, but some machines are still abnormal. Because of time constraints and concerns about other effects, we can only be forced to adopt a 16MHZ method to solve this problem, but if there is a better way, we Want to improve.

[you can123]

This is the PCB diagram of our FLASH part connection, please refer to it.

[haakonsh]

I have seen some customers benefitting from using a 50 or 100ohms series resistor on the SPI lines in some designs, that can be an option, but I'm not certain it will work.