What is the minimum hold time for an input GPIO to generate an IN EVENT on a GPIOTE channel?

[Kevin Doss]

I have an application where I need to count clock cycles on a GPIO input. I'm configuring a GPIOTE channel N to generate an IN EVENT on rising edge of an input GPIO PIN (the clock signal) and then publishing the IN EVENT to a DPPI channel that is triggering the COUNT TASK of a TIMER that is configured in Counter mode.

This implementation works perfectly as long as the clock is not too high in frequency. For example, when the clock is 48 kHz my counter accurately counts the clock cycles. At higher frequencies (e.g. 3 MHz) the Counter is only capturing about 2/3 of the clock cycles. At much higher frequencies (e.g. 12 MHz), the Counter doesn't capture any clock cycles.

In the nRF5340 product spec, the GPIOTE section references a spec for minimum hold time when operating in Low-Latency mode (tGPIOTE,HOLD,LL) but the Electrical Specification section for the GPIOTE module is empty.

My question is what is the value of tGPIOTE,HOLD,LL? Or alternately, what is the maximum frequency of an input signal in order to reliably generate the IN EVENT in the GPIOTE module?

Thank you

Kevin Doss, Shure, Inc.

[Kazi Afroza Sultana]

Hello Kevin,

You can look at this post (+) on nRF5340, how to generate clock to an output pin, 5/10/20 MHz or 8/16/32 MHz nRF5340 clock ou - Nordic Q&A - Nordic DevZone - Nordic DevZone (nordicsemi.com). 

Best Regards,

Kazi Afroza Sultana

[Kevin Doss]

Similar topic, but it doesn't answer my  question. I'm doing the opposite thing... I have clock signal feeding into a GPIO input pin and I need to count clock cycles. My solution works, but there is a limit to the how high the frequency of the input clock signal can be before the counter becomes inaccurate or at some point totally non-functional. I'm trying to to discover what that limit is. I believe it's limited by the tGPIOTE,HOLD,LL spec for the GPIOTE module, but that spec is not disclosed in the nRF 5340 Prodect Spec.

Thanks

[Kazi Afroza Sultana]

Hello Kevin,

I have not seen any specific value for maximum frequency of  GPIOTE. I Have been contacted with my team if there is any specific value. I will let you know if there is any definite value.

Maximum clock frequency depends on duty cycle and System mode (on or off) so these factors have impact to define the specific frequency. There is an old post (+) Max Freqency GPIOTE Event PPI to Counter - Nordic Q&A - Nordic DevZone - Nordic DevZone (nordicsemi.com) you can look at.  It is for nRf52. But GPIOTE should be same for nRF53 as well as nRf52.

 Best Regards,

Kazi Afroza Sultana

[Kevin Doss]

I believe this old post explains what I'm seeing. Since the clock signal I'm monitoring has a 50% duty cycle it appears the the maximum frequency will be 2.67 MHz. When my signal is configured at ~3 MHz I'm seeing only a subset of clock cycles being counted.

Thanks for this info, I'm satisfied that what I was trying to do will not work with the clock frequency I was hoping to use. I will need to find another solution.

Regards,

Kevin