How to implement SPIM in net core (nRF5340) - No SPI signal detedted

[TChien112]

Hi there,

I have a problem to implement the SPIM in the Network core. I cannot detect any signal from SPI_SCK & SPI_MOSI by oscilloscope and logic analyzer (no signal from other two pins SS & MISO either)
Is there anything I need to configure to enable the SPIM in Network node?

I flashed the "empty_app_core" example code to the App core
And I wrote a simple code to test the SPIM functionality (signal output in SCK and MOSI)
It is the main.c for network core.

//main on SPI master
#include <zephyr.h>
#include "nrf.h"
#include <nrfx_spim.h>
#include <string.h>
#include <logging/log.h>
#define LOG_MODULE_NAME spi_master
LOG_MODULE_REGISTER(LOG_MODULE_NAME, LOG_LEVEL_DBG);

static const nrfx_spim_t net_spim = NRFX_SPIM_INSTANCE(0);
#define APP_SPIM_CS_PIN (9)
#define APP_SPIM_SCK_PIN (7)
#define APP_SPIM_MISO_PIN (6)
#define APP_SPIM_MOSI_PIN (5)

void net_spi_init(void){
	nrfx_spim_config_t spim_config =
	NRFX_SPIM_DEFAULT_CONFIG(APP_SPIM_SCK_PIN, APP_SPIM_MOSI_PIN, APP_SPIM_MISO_PIN, APP_SPIM_CS_PIN);
    // spim_config.frequency = NRF_SPIM_FREQ_1M;
    // spim_config.mode      = NRF_SPIM_MODE_1;
    // spim_config.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST;
    if (NRFX_SUCCESS != nrfx_spim_init(&net_spim, &spim_config, NULL, NULL)) {
		LOG_DBG("Init Failed\n");
		return;
	}
}



void main(void)
{
	LOG_DBG("SPIM example\n");

    net_spi_init();
    int i = 0;
    uint8_t writeReg_array[5] = "12345";
    uint8_t reg_data[5] = "00000";
    while(1){  
        nrfx_spim_xfer_desc_t xfer_desc;
        xfer_desc.p_tx_buffer = writeReg_array;
        xfer_desc.tx_length = 5;
        xfer_desc.p_rx_buffer = NULL;
        xfer_desc.rx_length = 0; 
        nrfx_spim_xfer(&net_spim,&xfer_desc,0);    
        k_sleep(K_MSEC(1000));
        i++;
        LOG_DBG("SPIM write test %d\n",i);
    }
}

And the prj.conf file

CONFIG_SERIAL=y
CONFIG_LOG=y
CONFIG_HEAP_MEM_POOL_SIZE=4096

CONFIG_SPI=y
CONFIG_NRFX_SPIM=y
CONFIG_MAIN_STACK_SIZE=4096
CONFIG_NRFX_SPIM0=y

CONFIG_RTT_CONSOLE=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_LOG_BACKEND_UART=n

I can see the log in RTT viewer

00> *** Booting Zephyr OS build v2.7.99-ncs1-1  ***
00> 
00> [00:00:00.421,936] <dbg> spi_master.main: SPIM example
00> 
00> [00:00:01.422,058] <dbg> spi_master.main: SPIM write test 1
00> 
00> [00:00:02.422,210] <dbg> spi_master.main: SPIM write test 2
00> 
00> [00:00:03.422,332] <dbg> spi_master.main: SPIM write test 3
00> 
00> [00:00:04.422,454] <dbg> spi_master.main: SPIM write test 4
00> 
00> [00:00:05.422,576] <dbg> spi_master.main: SPIM write test 5
00> 
00> [00:00:06.422,698] <dbg> spi_master.main: SPIM write test 6
00> 
00> [00:00:07.422,821] <dbg> spi_master.main: SPIM write test 7
00> 
00> [00:00:08.422,943] <dbg> spi_master.main: SPIM write test 8
00> 
00> [00:00:09.423,065] <dbg> spi_master.main: SPIM write test 9

However, there is no signal output from SCK and MOSI pin.

SDK version: nRF Connect toolchain v1.9.0

[TChien112]

I have a question about the nrf5340dk_nrf5340_cpunet.dts and nrf5340dk_nrf5340_cpunet.overlay files.
I see the content in nrf5340dk_nrf5340_cpunet.dts will be overwritten by nrf5340dk_nrf5340_cpunet.overlay.
And I found that there is a pinset definition for all four SPI pins in nrf5340dk_nrf5340_cpunet.dts file.

arduino_spi: &spi0 {
	compatible = "nordic,nrf-spim";
	/* Cannot be used together with uart0. */
	/* status = "okay"; */
	sck-pin = <47>;
	miso-pin = <46>;
	mosi-pin = <45>;
	cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>; /* D10 */
};

Do I need to overwrite those pins value in my .overlay file?
Also, if I set up the SPI pins in my main.c file, should I modify the overlay file to make these two pins setting the same?
For example, if I set the SPI pins in main.c as:

#define NET_SPIM_CS_PIN (41)
#define NET_SPIM_SCK_PIN (39)
#define NET_SPIM_MISO_PIN (38)
#define NET_SPIM_MOSI_PIN (37)

void net_spi_init(void){
	nrfx_spim_config_t spim_config =
	NRFX_SPIM_DEFAULT_CONFIG(NET_SPIM_SCK_PIN, NET_SPIM_MOSI_PIN, NET_SPIM_MISO_PIN, NET_SPIM_CS_PIN);
    spim_config.frequency = NRF_SPIM_FREQ_1M;
    spim_config.mode      = NRF_SPIM_MODE_1;
    spim_config.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST;
    if (NRFX_SUCCESS != nrfx_spim_init(&net_spim, &spim_config, NULL, NULL)) {
		LOG_DBG("Init Failed\n");
		return;
	}
}

Do I need to add the pin setting in nrf5340dk_nrf5340_cpunet.overlay file? like this

&spi0 {
	status = "okay";
	sck-pin = <39>;
	miso-pin = <38>;
	mosi-pin = <37>;
};

Thank you

[Øivind]

Since you are accessing the nrfx api directly, you can entirely ignore the spi in dts files. Enabling spi0 in the dts file or overlay will likely only cause problems.
You need to disable the uart0 in the overlay because uart0 and spi0 share resources.

Did you see any improvement after changing the name of the overlay file? Does the build system include it in the build log? If you are unsure, you can post the build log here and I will check for you.