SPI MISO data bus empty on logic Analyser

[vw_dev]

Hello everyone,

I am working with the SDK v17.1.0 with the DK nRF52832. I want te retrieve data from a battery cell monitor which uses the LTC6804 from Analog Device. 

I am communicating with it through SPI and sending it the trams of commands necessay to read the voltage of the cells. Through a logic Analyser, I see that I am sending the correct frames on the MOSI bus, the clock is working fine and the Channel Select aswell.

The only thing that is always empty is the MISO bus which means that I can't retrieve the data from the LTC6804. I have tried everything that was described in the devzone (Correct Pins, changing SPI mode, pull-up resistors, changing the size of my rx buffer) but nothing worked. 

Do you have any ideas?

Thank you!

The frames I am sending to read the voltage:

My SPI configuration

The logic analyser results:

 

[hmolesworth]

I think MISO should be high - regardless of whether the PEC is calculated correctly - when a tx frame from the host nRF52 is started; since it is shown as low on the logic analyser this implies there is no pull-up fitted (pedantic: or no pin connection or incorrect nRF52 pin config or pin short to ground):

"Connecting ISOMD to V– configures serial Port A for 4-wire SPI. The SDO pin is an open drain output which requires a pull-up resistor tied to the appropriate supply voltage"

[vw_dev]

Thank for the answer!

I added in my setup a pull-up resistor powered by the VDD of the DK, on every SPI buses, and I configured in the sdk_config.h :

NRF_SPI_DRV_MISO_PULLUP_CFG 3

Which configure the MISO GPIO pin into pull-up.  

Now it seems that the data in the MISO bus is the same as the MOSI's as shown in the picture. But no traces of the response... Can you help me with that?

Thank you

 

[Jared]

fair point, vw_dev could you double check this?

[vw_dev]

Hello, 

Thank you for your answer. 

The slave is configured so that when it receive commands frames, it would respond automatically. I only changed the physical jumpers to disable isoSPI communication and enable SPI communication. 

On the slave board, the uC used is the LTC6804-1, which is indeed daisy-chainable. I know that the slave is also configured so that it transmits the data to a external uC as the nRF. I am only using one slave, so I assumed that the slave would respond only after receiving command frames. 

[vw_dev]

What I find strange is that on a normal SPI communication, the response on the MISO bus should be after receiving the command frames, which is not the case here. 

The logic analyser is only displaying what data go through the bus, right? So I don't know if the issue is starting from here

[Jared]

Something is obviously not correct here, it's either the logic analyzer not configured correctly or the slave. Can you flash the chip with the nrfx SPI example from the SDK and see if the data is duplicated on MISO?

[vw_dev]

Hello, 

I solved the issue. It was at a hardware level: 

I am using a demo circuit implementing the LTC6804 which output is in isoSPI. I added a isoSPI/SPI interface and then connected it with a breadboard to the nrf52832. I also removed my pull-ups and it is working fine.

The MOSI channel is sending the right frames and the MISO is responding only after the MOSI frames with the correct values. It was not because the logic analyser were not configured correctly.

Thank you for your help!