Write protection pin for External SPI Flash configuration

[Riccardo Gaiati]

Hi,

i am working with nRF5340, nRF Connect SDK 1.9.1 and an external SPI Nor Flash.

The configuration in the device tree is the following:

/* External flash  */
&spi4 {
	label = "spi-ext-flash";
	compatible = "nordic,nrf-spim";
	status = "okay";

	sck-pin = < 17 >;
	mosi-pin = < 13 >;
	miso-pin = < 14 >;
	cs-gpios = < &gpio0 18 GPIO_ACTIVE_LOW >;

	mx66: mx66u1g45g@0 {
		compatible = "jedec,spi-nor";
		label = "MX66";
		reg = <0>;
		spi-max-frequency = <16000000>; /* Max frequency achievable with nRF5340 at 64Mhz */
		size = <1073741824>;	/* Size in bit set to 1 Gb (128 MBytes) */
		wp-gpios = < &gpio0 15 GPIO_ACTIVE_LOW >;
		enter-4byte-addr = <0x85>;
		has-dpd;
		t-enter-dpd = <10000>;
 		t-exit-dpd = <30000>;
		jedec-id = [c2 25 3b];
	};
};

I do not see any activity on the Write Protection pin when the code is run.

Could you please give me a feedback regarding the configuration of the writep protection and reset pin defined in the device tree file ?

Is any code generated if those pin are declared in the device tree file ?

Thanks in advance for the help !

[Simonr]

Hi

Sorry about the late reply, but due to low staffing during the summer vacation period here in Norway, delayed response times must be expected.

Are you using the JEDEC SPI-NOR sample in Zephyr as a base for your project? Is there a reason you're not using QSPI here and only regular SPI?

From what I can see in the MX66 datasheet, it doesn't seem to include a Write Protection Pin, if that is correct, then you won't see any activity on the Write protection pin. As far as I can see there aren't any issues with your device tree.

Best regards,

Simon

[Riccardo Gaiati]

Hi Simonr,

sorry for the big delay, but i am also on vacation.

I did not look at that specific project.

Initially I used QSPI, but for HW reason I had to move to SPI NOR Flash. So QSPI is not a possibility.

The external Flash that I am using provides a Write Protection pin, as well as a Reset pin

My question regards the fact if the low level driver are able to manage the write protection pin, if configured in the device tree. According to my tests, it does not seem. So, if this is the case, the second question is: will this management be integrated in the future version of the sdk ?

Kind regards

Riccardo