SPI NOR peripheral restart

[PieterJericho]

Hi 

I have an external NOR flash chip which is powered off on startup. The idea is to power up the flash when needed to reserve power. On startup, I get the error message:

<err> spi_nor: SFDP magic ffffffff invalid
<err> spi_nor: SFDP read failed: -22

Enabling the power pin only starts during application code, meaning SPI-NOR fails before that.

Is there a way to restart the SPI-NOR instance or driver to re-attempt initializing the device?

I have had limited success by reorganizing boot priorities to have GPIO start before SPI, but what about the case where I have to reinitialize during runtime?

I have also tried remounting the fstab entry, but it doesn't seem to do anything to the SPI situation.

I appreciate any guidance regarding this

[Simonr]

Hi

I would recommend trying to get the QSPI to work, as the DPM should be the best way to achieve what you're describing I think. What nRF Connect SDK version are you developing on? Can you show me the .dts overlay file when trying to set up the QSPI, and how it's set up in your application file(s). On the overlay side of things it should look something like this, with different JEDEC ID, size, name, etc.

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	mx25r64: mx25r6435f@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* MX25R64 supports only pp and pp4io */
		writeoc = "pp4io";
		/* MX25R64 supports all readoc options */
		readoc = "read4io";
		sck-frequency = <8000000>;
		label = "MX25R64";
		jedec-id = [c2 28 17];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
		];
		size = <67108864>;
		has-dpd;
		t-enter-dpd = <10000>;
		t-exit-dpd = <35000>;
	};
};

Best regards,

Simon

[PieterJericho]

Hi Simonr 

Here is the QSPI dts overlay

 &qspi {
 	status = "okay";
 	sck-pin = < 13 >;
 	csn-pins = < 19 >;
 	io-pins = < 16 >, < 17 >, <15>, <14>;
 	sst26: sst26vf032bt@0 {
 		status = "okay";
 		compatible = "nordic,qspi-nor";
        sfdp-bfp = [ 53 46 44 50 06 01 02 ff ];
 		reg = <0>;
 		//writeoc = "pp";
 		//readoc = "fastread";
 		sck-frequency = <2000000>;
 		label = "EXFLASH0";
 		jedec-id = [bf 26 42];
 		size = <33554432>;
 		quad-enable-requirements = "S2B1v6"; // I've tried them all
 	    requires-ulbpr;
 		has-dpd;
 		t-enter-dpd = <10000>;
 		t-exit-dpd = <35000>;
 	};
 };

The code doesn't reach main() when QSPI is enabled in the kernel, so it cannot be application side.