QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE?

[Jiri Husak]

Dear Support,

as suggested I create specific question based on this thread:  QSPI EVENT_READY 

Could you please confirm that the QSPI peripheral makes polling of QSPI flash Status Register (command 0x05) by HW? I see that just after calling nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE) the peripheral starts continuous reading of status register. The same happens just after triggering NRF_QSPI_TASK_WRITESTART (just after the actual write).

I miss this information in the datasheet, so could you please confirm this behavior is correct?

Thank you very much.

Jiri

[ovrebekk]

Hi Jiri

This is correct, yes. The RDSR command is issued automatically to ensure writes or erase operations are not run too soon. 

Best regards
Torbjørn

[Jiri Husak]

Thanks Torbjørn,

I guess this can't be configured? We would like to switch off the QSPI and go to sleep during the flash process the erase command. However if we do that the ACTIVATE starts this loop (assuming the flash erase is not yet fully finished) and the nrfx driver gets crazy (timeout).

Anyway thanks for answer. 

Regards,

Jiri

[ovrebekk]

Hi Jiri

This can't be disabled, no. 

There is a hack you can do by reconfiguring the IO0 pin to a different pin that has pull down enabled. Then the WIP bit will be read as 0, and the QSPI peripheral will assume that the operation is complete. 

Please note that this might have unintended side effects, and you would obviously have to configure it back before trying to send any commands over the QSPI interface. 

Best regards
Torbjørn