Inaccurate synthesized LF clock

Hi,

During the validation of our device, we found that the RTC (synthesized from HFCLK) was quite a bit off. Instead of the expected 32.768kHz, we measured 33.047kHz. 

Do you know if we made a mistake somewhere in our tests or RTC configurations?

Hardware:

  • MCU: nRF52833 QDAAA0
  • HFCLK: External 32MHz clock, tolerance: 10ppm, stability: 15ppm
  • LFCLK: Synthesized from HF clock

Firmware:

Connect RTC to GPIOTE output with PPI. On every RTC tick, toggle a GPIO. 

  • NCS version: V2.1.0
  • RTC settings:
    • RTC inst: RTC2
    • RTC configs: default config (pre-scaler: 0, reliable: false)
    • Frequency: 32768
  • GPIOTE setting
    • Pin: 1.09
    • Drive: H0H1
    • Input connect: disconnect
    • pull: no-pull
  • Relevant setting:
    • CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y

Test setup:

The device toggles its pin every RTC pin, which creates a square wave with a frequency of LFCLK/2 (target: 16.384kHz). A frequency counter measures this signal for one hour. The frequency of the RTC is double the measured frequency.

Test result:

We measured a frequency of 16.5237 kHz, which means that the RTC has a frequency of 33.0474kHz. The frequency deviation from this signal is 297.4Hz or 8527ppm. This deviation is much higher than expected.

  • Do you know what could have caused this issue?
  • Did we make a mistake in our LFCLK settings?
  • Did we make a mistake in our test?

With kind regards,

Tim

Parents Reply
  • Hi Vidar,

    Thank you for your reply.

    I think this solved it. I compared the two versions (the one with and without your patch) with an oscilloscope. The version with your patch had greatly improved frequency stability, and the frequency was much closer to the targeted 32.768kHz. But I have to wait till Monday to get the test result from our test engineers. I will share the test results then.

    Enjoy your weekend!

    Kind regards,

    Tim

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