issue about the SPI Pin input Voltage of NRF5340

[Hannibalhz]

Dear Nordic Engineers

I have a question, it about SPI PIN input voltage of  NRF5340.

Our cutsomer use NRF5340 and STM32 develop a product. STM32 and NRF5340 use SPI to communicate. NRF5340 is Master and STM32 is slave.

We found a problem that sometimes SPI data have chaos while they communicate.  STM32 sending data to NRF5340 is chaos. We use Digital Storage Oscilloscope to test the MOSI pin of NRF5340,the wave of the MOSI pin is following.

The peak of voltage is very high, it has 4V. As well all know, the max high voltage of GPIO input equal to VDD.

I would like to know this peak whether affect NRF5340 receive the SPI data.

Best regards,

[Priyanka]

Hi Wang,

This seems to be outside the maximum recommended operation range. But it depends on the VDD too. Here you can see the absolute maximum ratings. It can go upto VDD +0.3V, i.e. if you have 3.6V VDD, then upto 3.9V. So I don't think it will damage the SPI, unless you have a really low VDD like 1.8V for example. Maybe you could enable high drive on MOSI or CLK. Or use a slower SPI clock even.

-Priyanka

[Hannibalhz]

Hi Priyanka

Excause me, my description has some unclear.

NRF5340 receives the data is abnormal. We test the pin of reception, it's wave is the above picture.

So, the pin of reception is input pin. I read the nRF5340 Product Specification,it shows the VIH_max = VDD.

Our customer the Voltage of VDD is 3.3v on their board. 

Do you think this wave is ok? Could you have other suggestion?

Best regards,

[Priyanka]

Hi Wang,

Yes this is quite outside the recommended range and can cause damage. The ESD diodes on the GPIOs will start to conduct current, and they will try to pull the VDD voltage on the nRF53 up to 3.7V (4V - 0.3V).

Are you powering the STM32 and the nRF5340 from the same power source? If not, please do try this because then they can be on same voltage level. Otherwise you will have to use an external level shifter.

-Priyanka