TIMER 2 not capturing value

[inspiringdev123]

I am currently trying to set up TIMER 2 to cause a compare event near overflow. I have the default timer configurations set up, and the compare event seems to trigger as I see in the debugger. When I try to capture the value of CC[1] when it compares, the value is never near the max value of the timer. I am setting the CC[1] register to 60000 to capture around then. I have attached the code as well. Thanks

nrf_drv_timer_config_t timer_cfg2 = NRF_DRV_TIMER_DEFAULT_CONFIG; //default settings should use NRF_TIMER_FREQ_8MHz, changable in sdk_config.h
    err_code = nrf_drv_timer_init(&system_timer_cc_0_2, &timer_cfg2, system_timer_cc_0_2_handler);
    APP_ERROR_CHECK(err_code);

    //note NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK clears out the current timer base value, good for the initilizer but not the next CC event handler
    nrf_drv_timer_extended_compare(&system_timer_cc_0_2, NRF_TIMER_CC_CHANNEL1, 60000, NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK, true);


    system_timer_cc_0_1_init(); //setup system timer 1 events and tasks
    system_timer_cc_0_2_init(); //setup system timer 2 events and tasks

void system_timer_cc_0_2_init(void)
{
    uint32_t capture_task_addr;
    uint32_t compare_evt_addr;
    uint32_t gpiote_evt_addr;
    ret_code_t err_code;
    nrf_drv_gpiote_in_config_t in_config;

    /* CC[1]
     * Set PPI task for overflow on system timer channel[1]
     * 
    */
    compare_evt_addr = nrf_drv_timer_event_address_get(&system_timer_cc_0_2, NRF_TIMER_EVENT_COMPARE1);

    // setup ppi channel to compare to timer 2 value 
    err_code = nrf_drv_ppi_channel_alloc(&(ppi_channel[1]));
    APP_ERROR_CHECK(err_code);

    // enable this through BLE commands for now
    err_code = nrf_drv_ppi_channel_enable(ppi_channel[1]);
    APP_ERROR_CHECK(err_code);


    /* CC[2]
     * Setup PPI tasks for GPIOTE and system timer channel[2]
     * for speedo/tach
    */

    //VCE: The below block needs to be called for each pin
    in_config.pull = NRF_GPIO_PIN_NOPULL; //User defined
    in_config.sense = NRF_GPIOTE_POLARITY_LOTOHI; //User defined
    in_config.hi_accuracy = true; //User defined
    in_config.is_watcher = false; //Don't change this
    in_config.skip_gpio_setup = false; //Don't change this

    //enable the pin for GPIOTE
    err_code = nrf_drv_gpiote_in_init(SPEEDO_TACHO_PIN_NUMBER, &in_config, speedo_tach_input_handler);
    APP_ERROR_CHECK(err_code);

    //setup a ppi channel to associate with the system_timer_cc_0_2 capture events
    err_code = nrf_drv_ppi_channel_alloc(&(ppi_channel[2]));
    APP_ERROR_CHECK(err_code);

    capture_task_addr = nrf_drv_timer_event_address_get(&system_timer_cc_0_2, NRF_TIMER_TASK_CAPTURE2);
    gpiote_evt_addr = nrf_drv_gpiote_in_event_addr_get(SPEEDO_TACHO_PIN_NUMBER);

    err_code = nrf_drv_ppi_channel_assign(ppi_channel[2],  gpiote_evt_addr, capture_task_addr);
    APP_ERROR_CHECK(err_code);

    err_code = nrf_drv_ppi_channel_enable(ppi_channel[2]);
    APP_ERROR_CHECK(err_code);

    nrf_drv_gpiote_in_event_enable(SPEEDO_TACHO_PIN_NUMBER, true);

    //Once all system_timer_cc_0_2 shared peripherals are ready, enable the shared timer
    nrf_drv_timer_enable(&system_timer_cc_0_2);
}

void system_timer_cc_0_2_handler (nrf_timer_event_t event_type, void * p_context)
{
    volatile uint32_t timerCount = 0;
    switch(event_type)
    {
        case NRF_TIMER_EVENT_COMPARE1:                    //call when timer 2 overflows
            NRF_TIMER2->TASKS_CAPTURE[1] = 1;             // This is asking to capture the current counter into CC[2]
            timerCount = NRF_TIMER2->CC[1];               // counter value  at the instant when capture task was triggered is now ready to be read in CC[2]
            NRF_TIMER2->TASKS_STOP = 1;                   // Stop Timer
            NRF_TIMER2->TASKS_CLEAR = 1;                  // set count value to 0
            
            mOverFlowCount++;
            if (accumSpdCnt > (SPD_PERIOD_MAX - SPD_COUNT_MAX))
            {
                    accumSpdCnt = SPD_PERIOD_MAX;    // limit peak value

                    // If we are at the max value (and really we should never
                    // get here since previous passed through this code should
                    // have published the value).  This is a fail safe and therefore
                    // we should not scale the value by the hw divider
            }
            else
            {
                  accumSpdCnt += SPD_COUNT_MAX;    // room to add more ticks

                  // When the pulse count exceeds the current value, we are slowing down
                  // and need to publish the values so the gauge values decrease
                  if (accumSpdCnt > curSpdCnt)
                  {
                      curSpdCnt = accumSpdCnt;
                  }
       
            } 
            timerSetCC1(60000);
            NRF_TIMER2->TASKS_START = 1;   // Start timer
            break;
        default:
            break;
    }
    
}

[Jared]

Hi,

Could explain a bit more in detail what your code does?

As far as I can see you're setting up a PPI on channel 2 that connects the LoToHigh event on a GPIOTE pin to a CAPTURE task. Which means that when the pin is toggled from low to high, the value of the Timer will be captured in the CC2 register. At same time you're setting up a COMPARE event on CC1 register for 60000. What is controlling the GPIOTE pin? And can you share a screenshot of the the Timer registers when you get the first event. 

Also what is TIMER_DEFAULT_CONFIG_BIT_WIDTH set to in your config file?

regards
Jared 

[inspiringdev123]

I removed the extended compare to a normal compare and am now reading in values on CC[1]. Would the Clear Mask Task clear the timer before I am able to capture the value?

[Jared]

Hi,

Yes, Whatever that happens in the callback handler will happen after the PPI have performed the Clear mask task. The callback handler runs in the CPU while the clearing of the mask use PPI which is independent of the CPU. 

regards

Jared