DTM test, poor sensitivity problem

[stars]

Hi，

  Our client has about the hardware design of nrf52805. There is a big difference in sensitivity between the boards of the front and back batches of pDTM test, poor sensitivity problematches (PCB is the same batch), and it has been determined that the matching network should be selected according to the recommended value of the chip (device package is 0201).

The first batch was -96dBm.The second batch was -93~-94dBm.And the first batch of sub-boards has been worn out, difficult to cross-test verification，The customer wants to know if there is any data and report on RF test environment and process of nrf52805. These cannot be obtained from the chip manual. If so, please help to provide them.

Best regards,

star

[stars]

Hi，

The problem has been solved. For convenience, the DTM program is embedded into the application(Existing stack) and switched through GPIO port. The sensitivity measured using the DTM program in the SDK is -96dBm.

There's a quote in the manual,

Would you like to ask how the protocol stack determines which receiving addr0 to use? Can we configure it? If so, how to configure.

[Priyanka]

stars said:

There's a quote in the manual,

The picture you attached doesn't show up here.

stars said:

Would you like to ask how the protocol stack determines which receiving addr0 to use? Can we configure it? If so, how to configure.

This is not possible as you will always have to use addr0.

[stars]

Hi,Priyanka

The screenshot is

"Typical sensitivity applies when ADDR0 is used for receiver address correlation. When ADDR[1...7]

are used for receiver address correlation, the typical sensitivity for this mode is degraded by 3 dB"

Best regards,

star

[Priyanka]

Ah Okay. But yes, as mentioned previously, you will always have to use addr0.

[stars]

Hi,

Thank you for your reply!

Best regards,

stars

[Priyanka]

Welcome