Hey folks,
I'm trying to modify the SPI Master loop back example into a 4 line SPI Master_Slave program. Whenever I change the Tx_Buffer_lenght from 10 to lsome other numbers...
Hi.
I am using S130 softdevice version.
Basically, I am using NUS Service and make a my own NUS central service as NUS_C.
It is correctly work at normal state.
When...
Hi All,
Please Reviwe for a attached circuit file(Chip ANT of nRF51822.pdf).
I also attach a datasheet of chip antenna applied for that circuit(SDBTPTR3015 Data Sheet...
to me it made sense that EN_AA settings are controlling the receiving pipes if an ACK has to be sent back upon receiving a valid packet.
then i thought that the settings...
I am using BLE_Gateway example defined in nRF51-ble-bcast-mesh to create an rbc_mesh over 2 nRF51422 devices . For now, I am just testing it out on 2 nRF51422; I will set...
The RISC-V coprocessor of the nRF54L Series requires a correct setup of the memory layout, for good performance and correct operation of both the application CPU and the FLPR
The nRF54L Series SoCs features a RISC-V coprocessor, enabling efficient, flexible designs with enhanced performance and ultra-low-power wireless connectivity.
