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NRF5340 Schematic Review, External Regulator

Hownowbrowncow

Hello,

I'm wondering if someone can review this schematic document for an AoA application using the NRF5340. I'm generally concerned about the power and crystal schema, and that important signals are brought to test points.

Thanks!

NRF5340_schematic_page2.pdf

Parents
  • +1

    I see you have quite a few pins dedicated to AOA here, but only one antenna switch. Can you confirm on how many antennas you're planning on having on your board? I assume this will be the locator device of an AoA application, correct?

    As for the schematic review itself, here are my notes:

    • Seems like you're not using USB. If so, DECUSB, D- and D+ can be left floating/unconnected, and VBUS can be connected directly to GND.
    • Seems like you're not using the DCDC converter as I don't see DCCD being connected to anything.
    • The HF crystal you've noted as a 48MHz crystal. Can you upload the HFXO crystal datasheet so I can check that it's okay here.
    • The VDD 3V3 decoupling caps should be distributed as in the reference schematics. 2x 1.0µF capacitors and 8x 100nF capacitors.
    • DECR and DECRF should be connected to two decoupling caps of 1µF and one 2.2nF.
    • I see you're using the NFC pins as GPIOs, note that this will need to be handled in the devicetree of your application when you start developing application firmware.

    Best regards,

    Simon

Reply
  • +1

    I see you have quite a few pins dedicated to AOA here, but only one antenna switch. Can you confirm on how many antennas you're planning on having on your board? I assume this will be the locator device of an AoA application, correct?

    As for the schematic review itself, here are my notes:

    • Seems like you're not using USB. If so, DECUSB, D- and D+ can be left floating/unconnected, and VBUS can be connected directly to GND.
    • Seems like you're not using the DCDC converter as I don't see DCCD being connected to anything.
    • The HF crystal you've noted as a 48MHz crystal. Can you upload the HFXO crystal datasheet so I can check that it's okay here.
    • The VDD 3V3 decoupling caps should be distributed as in the reference schematics. 2x 1.0µF capacitors and 8x 100nF capacitors.
    • DECR and DECRF should be connected to two decoupling caps of 1µF and one 2.2nF.
    • I see you're using the NFC pins as GPIOs, note that this will need to be handled in the devicetree of your application when you start developing application firmware.

    Best regards,

    Simon

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