pinectrl.dtsi and dts settings for W25Q128JVPIQTR using SPI with a nrf5340

[lcj]

I am creating a custom board with an  W25Q128JVPIQTR external flash drive using SPI with a nrf5340. The pins are:

• P0.08 - SD_CLK 
• P0.09 - SD_MOSI
• P0.10 - SD_MISO
• P0.13 - SD_CS 
• P0.14 - SD_WP 
• P0.15 - SD_RST 

What do I put in the pinctrl.dtsi file and what do I put in the dts file?

I see this for the mx25r64 on the nRF5340 DK in the pinctrl.dtsi file:

	qspi_default: qspi_default {
		group1 {
			psels = <NRF_PSEL(QSPI_SCK, 0, 17)>,
				<NRF_PSEL(QSPI_IO0, 0, 13)>,
				<NRF_PSEL(QSPI_IO1, 0, 14)>,
				<NRF_PSEL(QSPI_IO2, 0, 15)>,
				<NRF_PSEL(QSPI_IO3, 0, 16)>,
				<NRF_PSEL(QSPI_CSN, 0, 18)>;
			nordic,drive-mode = <NRF_DRIVE_H0H1>;
		};
	};

	qspi_sleep: qspi_sleep {
		group1 {
			psels = <NRF_PSEL(QSPI_SCK, 0, 17)>,
				<NRF_PSEL(QSPI_IO0, 0, 13)>,
				<NRF_PSEL(QSPI_IO1, 0, 14)>,
				<NRF_PSEL(QSPI_IO2, 0, 15)>,
				<NRF_PSEL(QSPI_IO3, 0, 16)>;
			low-power-enable;
		};
		group2 {
			psels = <NRF_PSEL(QSPI_CSN, 0, 18)>;
			low-power-enable;
			bias-pull-up;
		};
	};

And this in the common.dtsi:

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	mx25r64: mx25r6435f@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* MX25R64 supports only pp and pp4io */
		writeoc = "pp4io";
		/* MX25R64 supports all readoc options */
		readoc = "read4io";
		sck-frequency = <8000000>;
		jedec-id = [c2 28 17];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
		];
		size = <67108864>;
		has-dpd;
		t-enter-dpd = <10000>;
		t-exit-dpd = <35000>;
	};
};

How do I change them for the W25Q128JVPIQTR?

[Kazi Afroza Sultana]

Hello,

You need to define the correct definition of the external flash under the correct SPI node in devicetree pincontrol. 

We have one example https://github.com/nrfconnect/sdk-zephyr/blob/main/samples/drivers/jesd216/boards/nrf52840dk_nrf52840_spi.overlay 

Here, the default setup for mx25r64 is moved to SPI2 node, so we disabled the QSPI node in the overlay file and deleted the mx25r64 node.

You can chose any SPI as master and can define the definition for flash device in the devicetree overlay file.

[lcj]

I guess I was looking for how these settings might change for the W25Q128VPIQTR specifically in the pinctrl file and in the dts file.

The link you provided shows this for the mx25r64 but I cannot find the spi2_default and spi2_sleep. Maybe they're in the nrf nrf52840. Regardless, here is configuration:

&spi2 {
	compatible = "nordic,nrf-spi";
	status = "okay";
	cs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&spi2_default>;
	pinctrl-1 = <&spi2_sleep>;
	pinctrl-names = "default", "sleep";
	mx25r64: mx25r6435f@0  {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <8000000>;
		jedec-id = [c2 28 17];
		size = <67108864>;
		wp-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
		hold-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
	};
};

So, I would need to revise it for the W25Q128JVPIQTR in the pinctrl.dtsi like (Chat GPT provided):

    spi1_default: spi1_default {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // SCK on P0.08
                    <NRF_PSEL(SPIM_MOSI, 0, 9)>,  // MOSI on P0.09
                    <NRF_PSEL(SPIM_MISO, 0, 10)>, // MISO on P0.10
                    <NRF_PSEL(GPIO, 0, 13)>;     // CS on P0.13
            drive-mode = <NRF_DRIVE_H0H1>;       // High drive strength
            bias-pull-up;                       // Optional: Enable pull-up
        };
    };

..and the DTS file look like this:

&spi1 {
    &spi1 {
        compatible = "nordic,nrf-spim";
        status = "okay";
    
        // Link the pin configuration
        pinctrl-0 = <&spi1_default>;
        pinctrl-names = "default";
    
        flash@0 {
            compatible = "jedec,spi-nor";
            reg = <0>;
            spi-max-frequency = <8000000>; // 8 MHz
            label = "W25Q128";
            jedec-id = [0xef 0x40 0x18];   // Winbond ID for W25Q128
            size = <0x1000000>;            // 16 MiB
        };
    };

This example is from a post Nrf5340 and W25Q128JV Nor Flash R/W problem?

&qspi {
    status = "okay";
    
    flash0: w25q128@0 {
        compatible = "nordic,qspi-nor"; /* Change to QSPI compatible */
        reg = <0>;
    sck-frequency = <8000000>;
    jedec-id = [ef 40 18]; /* W25Q128JV JEDEC ID */
    size = <134217728>; /* 128 Mbit */
    writeoc = "pp"; 
    readoc = "read";
};
// Only for refernce

In it was another example for w25q512 which wasn't working as well but looked very different (and is qspi also):

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	w25q512: w25q512nw@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* MX25R64 supports only pp and pp4io */
		writeoc = "pp4io";
		/* MX25R64 supports all readoc options */
		readoc = "read4io";
		sck-frequency = <8000000>;
		// jedec-id = [c2 28 17];
		jedec-id = [EF 60 20];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
		];
		size = <536870912>;
		// address-size-32;
		has-dpd;
		// t-enter-dpd = <10000>;
		// t-exit-dpd = <35000>;
		t-enter-dpd = <3000>;
		t-exit-dpd = <30000>;
	};
};

[Kazi Afroza Sultana]

Hello,

The link I showed that was for an example how to add external flash under SPI instance in the overlay file. You are right as it is for nRF52840DK, it does not need to have any modification or adding in the pin control file as SPI2 is already defined in the pin control file.

For your case adding external flash W25Q128JVPIQTR with nRF5340), You have to define spi2 in the pincontrol and overlay file. 

You can add the following set-up in the pincontrol file (The pin numbers would set as per your configuration; this is just an example)

&pinctrl {
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 12)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>;
};
};

spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 12)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>;
low-power-enable;
};
};
};

After that you have to add the external flash under this spi2 node in the overlay file

&spi2 {
    compatible = "nordic,nrf-spim";
    status = "okay";
    cs-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
    pinctrl-0 = <&spi2_default>;
    pinctrl-1 = <&spi2_sleep>;
    pinctrl-names = "default", "sleep";

    w25q128: w25q128jvpiqtr@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <8000000>;
        jedec-id = [ef 40 18];
        size = <134217728>;
        has-dpd;
        t-enter-dpd = <3000>;
        t-exit-dpd = <30000>;
    };
};

You do not need to need anything on common dts file. You can read this blog post (+) Adding a Peripheral(SPI) to an NCS (version 1.x) Zephyr project - Peripherals And RF Test - nRF Connect SDK guides - Nordic DevZone to know about this precisely.

Thanks.

BR

Kazi

[lcj]

Thank you. This is very helpful. I think it will close the issue but would like to test it. Since it's a custom board I should put the first block of code into the pinctrl/dtsi and the second in the xxx_common.dts vs the overlay, right?