nRF240L01 with STM8L051F3

[Omi]

Hi, I am looking for procedure to make it work nRF240L01? I am getting documents for Arduino but as you know that is not understandable, with Arduino it worked but i don't understood. Now i want to make it work with STM8L051F3. STM8L051F3 is 8 bit ultra low power controller. I am looking for procedure like what steps i have to follow so i can send data to another nRF240L01. Which commands i have to send. I want to transmit data after every 1 sec and then it will go in power down. Receiver will be always in receiver mode.

[o.hojvat]

Thank yo very much for your reply

I will do exactly as the example you sent an inform results in about 2 days

I have well tested the SPI comunications , working OK

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Level compatibility with 5VuP VCC.

 I have measured  CE  CSN  MOSI  and they are OK about input levels for uP   Vcc = 5V)

MISO output with 4K7  resistor to +5V  also has complete 0 an 5V range.

For  IRQ  similar resistor to +5V has no effect. I didn't find this information in data sheet

If uP has some problem with 3.3V as high level, I can reduce the Vcc supply to about 4V or add a small mosfet transistor as inverter (modifying as needed IRQ polarity definition)

Regards, Osvaldo

[ovrebekk]

Hi Osvaldo

Sorry for the slow response, I was out in Easter vacation until today. 

Are you still having issues with this? 

The nRF24L01+ will only work in the 1.9-3.6V range, and it is important that you keep the supply and the interface signals within this range. 

If you are unable to use an MCU that supports this level you will need some kind of level shifters on the signals, and a separate regulator for the nRF device to provide the supply voltage. 

Best regards
Torbjørn

[VE3ID]

Thanks to all for the help I have had so far.  I am now able to send and receive complete packets, however, there is a terrible intermittency in my reading the status register to see if a packet has been sent out, sometimes it hangs on the <send 0x07> <listen for status including TX_DS> loop for many seconds!  I will try and include graphic of logic analyser.

[Håkon Alseth]

Hi,

 

TX_DS should occur quickly, especially when using "W_TX_PAYLOAD_NO
ACK", as shown in the PS chapter 7.5.1:

 

If you have a stored logic trace of the SPI communication, I would be happy to have a look.

 

Kind regards,

Håkon

[VE3ID]

Thank you. The graphic would be pretty big, but my analyser is Pulseview and its output can go to srzip session file format data files, can you read those?

[VE3ID]

I tried to upload the srzip output in case you can read it, but it would not let me :-(  Thanks, Nigel

[Håkon Alseth]

Hi Nigel,

 

PulseView is not a problem.

VE3ID said:

I tried to upload the srzip output in case you can read it, but it would not let me

Unfortunately, the web engine is a bit restrictive in terms of file extensions. If you archive the file (tar, gz, bz, zip, rar, etc), you should be able to select and upload your file.

 

Kind regards,

Håkon