nRF52840 Layout and Impedance

[ZAC]

Noted the difference between the layouts concerning antenna matching among DK 0.9 and DK 0.11.

DK 0.9

DK 0.11

The screenshots are for L3. Differences between the two designs concerning L2 are the same.

Especially since there are not (yet) impedance values for the chip, one should be really carefull with copying the layout as it is. I should assume that the newer one is more correct?

Please supply more info/confirmation. For more please check the following tickets:

https://devzone.nordicsemi.com/f/nordic-q-a/28095/nrf52840-chip-impedance-bt-and-nfc

https://devzone.nordicsemi.com/question/177561/what-is-the-input-impedance-of-nrf52840-in-different-modes/

[FormerMember]

Yes, you should follow the newest one. 

[ZAC]

Any updates on the measured values?

[FormerMember]

The values needed may slightly vary from design to design. If you have a look at the reference layout (not the nRF52840-DK), you see that the values are slightly different. If you follow the reference design or the nRF52840-DK the result is likely to be quite good.

What is as important is that the layout itself is a copy of our reference layout/nRF52840-DK: It means that the matching network for the chip (C3,L1, C4) is an exact copy of our ref. layout with respect to the geometry and distances. This does also apply for the distance from the chip to C3. In addition, it is important to have a keep-out area of the inner layers in the RF part, see the reference layout. 

[ZAC]

Thanks for the feedback. Measured impedance values in the near future would be helpful to have.