nrf24l01+, pcb mifa antenna design

[JoE1205]

Hello guys,

I tried to design a pcb antenna for a nrf24l01+, since my company doesnt allow to buy cheap smd breakout board version from china anymore

The pcb stats of the producer:

• 2-layer FR4 1.55mm (61.023mil)  thickness, εr = 4.6
• Copper thickness, 35μm (1.378mil)

What I used:

• Guideline for pcb mifa antenna design:https://www.cypress.com/file/136236/download :
  Antenna basic dimensions: Page 10
  Cutting antenna length to ~115mil  as told on page 14
• nrf24l01+ schematic pictured in the datasheet page 66 (rev1.0)
• https://www.eeweb.com/tools/microstrip-impedance for calculation resulting into a feedingline width of 2.82mm (111.023mil), this is double the value of the recommended value in the cypress file. Not sure whats right.

This results into following desgin block:

The antenna area is clear of any signals aswell as ground on top or bottom layer.

Since I have absolutly zero experience with RF antenna design I would like to have some opinions regarding my design.

Thanks so far,

Joe

[JoE1205]

Hey guys, Im back

the current state of me trying to copy the design is the following. I designed it as a design block in EAGLE in order to import it into my project later. Thats why GND-plane is not implemented yet.

Had to find an other crystal which fits the requirements mentioned by AmbystomaLabs.
So far the GND-plane is planned for the dotted area, whereas the antenna is planed to be free of GND or any other signals on top and bottom layer.  Anyway Im unhappy with this huge empty space on the left. I guess its okay to reduce the size, but Im unsure about the holes. Is it okay to remove them completely and basicly cut everything whats not needed on the left? By the way: Whats the intention behind placing all the holes? Whats their use? I cant find a clear pattern so for me it looks very random. Do I need some more holes to seperate the antenna from the rest of the pcb, which is not shown in the picture? Still learning about the whole RF design topic and I very appreciate all your advices.

Thank you :)

[Øyvind]

Hello, and welcome back!

This is starting to look good. 

JoE1205 said:

Anyway Im unhappy with this huge empty space on the left. I guess its okay to reduce the size, but Im unsure about the holes. Is it okay to remove them completely and basicly cut everything whats not needed on the left?

The open area on the left should be used to add pads and/or GPIO pins for physical connection to flash/program/debug. Ref. the reference design I referred to in this comment, the image shows that there is a connector placed in the left side of the board. The holes which you mention are via-holes and are used to connect and ensure that the GND layers are connected. 

I recommend that you remove the vias and finish your layout with components, GND-plane, and traces. Then send the layout to us, and we can help with adding vias. Have a look at this tutorial on Eagle from Sparkfun, and our tutorial on RF design.
Kind regards,
Øyvind

[AmbystomaLabs]

If your goal is 3 meters then you should just use a chip antenna.  Both TDK and Johanson have multiple 2.4 GHz antennae that have reference designs to give a 50 ohm input. They will have several versions and each has a different ground plane and feed orientation.  Just choose something that looks right with your design.  Instead of your massive monopole, a chip antenna might occupy 4mm x 6mm. In this manner suddenly your screws and 10 pin smt aren't an issue since they will be very far away from the antenna.

Regarding your comment above on free ground plane, just increasing the size of a ground plane doesn't necessarily improve an antenna.  All antennae are designed with a particular size and orientation of ground plane in mind.  The ground plane both serves to load the antenna to get it to match better and also controls the radiation pattern. So if a design shows no ground plane on 3 sides and a 30x40mm ground on the feedpoint side then ideally yours should look the same.  What makes most of the chip antennae nice to design around is that many are created for designs that have ground on 3 of 4 sides and the ground size often conforms to many common requirements.  On the TDK site they even have a tool that will let you estimate your antenna response when you change the ground shape to accommodate your design needs.

[JoE1205]

Okay I will try to design a second version with a chip antenna. Anyway Im going to test both.
Regarding the chip antenna, I still dont understand how to correctly choose the width and lengh for feeding line. When Im using calculators I get width of 3mm, using the parameters mentioned in my initial post. That feels so wrong and is way to big. And in every datasheet is writen that you have to design the feeding line to provied 50 Ohm impedance.

For example: Johanson 2450AT18B100 (www.johansontechnology.com/.../2450AT18B100.pdf)

[AmbystomaLabs]

Generally the approach is to make everything 50 ohm characterized from the nRF to the antenna. On the antenna you follow the placement guidelines for its match components and on the nRF side you follow their placement guidelines for the nRF's match components.  In this manner the absolute length of the strip doesn't matter since both ends are ideally matched to 50ohms. So you understand if something is matched to 50 ohms and you put it on a 50 ohm microstrip then it will always look like a 50 ohm device no matter how long that strip is. The only thing that happens with the length is you get a loss of power being transferred through strip.  Thus you don't want it unnecessarily long. During transmit this would mean less power radiated out the antenna and during receive less power brought in from the antenna and poorer receive sensitivity.

The most popular microstrip design for small boards is as a coplanar waveguide with ground.  Essentially you bring the ground pour as close as you can to the strip it then capacitively loads the strip along with the ground plane below it.  Between the two you can get a fairly narrow strip that is characterized. Though I would say that most RF engineers just lay down the most compact design possible and just match the final solution.  Characterized lines are not really necessary, but they are convenient when you are just lumping two solutions together.

The most popular app for calculating the CPW is AppCAD.  It looks like broadcomm bought it from Avago (now keysight) so you can find it here: https://www.broadcom.com/appcad

[JoE1205]

Okay, that coplanar waveguide with ground results into realistic dimensions. Anyway could you please check my following designs regarding the feeding line. Im not sure about the correct positioning of the antenna components and about the calculation of the feeding line width.

I copied the basic desgin from the datasheet of chip antenna Johanson 2450AT18B100

The dimensions are not really very precise since its not  clear to which edge of the components or SMD pads the dimensions are referring to. The position of the chip antenna is unclear aswell.

1. Design: 4 layer pcb

As you can see I guessed that the given dimensions referred to the middle of the smd pads. Im not sure if thats right.

Same dimensions for my second design, but different width of feeding line.

2.Design: 2 layer pcb

I calculated the feeding line with this calculator ( can not install new software on this computer since IT is making problems :( )
https://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm

My pcb supplier is giving this pcb dimensions:

This results into following settings:

2 layer pcb:

Dieelectric thickness matches core ("Kern") thickness (1200um)

4 layer pcb:

Dieelectric thicknes matches prepreg (140um) with layer 2-4 used as GND layers.

Do you think that these designs will work out?
By the way: Thank you very much for putting all the time into helping me

[AmbystomaLabs]

Sorry for the late reply.  I saw your initial message then got swamped with work and it kind of got lost.

Your impedance calculations are similar to AppCad. AppCad shows both designs closer to 45 ohms and to get it to 50 just make the gap width 0.14mm ( 5.5 mil). Actually above 5 mil will make your board cheaper since smaller than 5 mil is generally a more expensive process.

It doesn't really matter if you do 4 layer or 2 layer.  You have room for the stripline so I would go for 2 layer since it is cheaper.  You should stitch your groundplane more. Most eda packages have a utility that will automatically stitch the entire board with vias. Unless you stitch it the analog portions of the chip won't operate correctly.

You have the wrong footprint for the epad of nRF chip.

[JoE1205]

Okay, changed the wrong footprint, edited the gap, added alot stitches by hand since I dont know a feature in Eagle for that. Result below.

[AmbystomaLabs]

You need to turn off the thermals on the vias.  There should be a selection in your software that says something like "flood over vias". Only plated thru holes for leaded devices get thermals since this makes soldering easier.

You can stitch under the crystal too.

You forgot to put vias under the nRF. Not sure how many you can fit by looking at it.  But an X of 5 vias should probably be sufficient. Just make sure the annular rings are well inside of the edge of the pad. Then you let them flood with mask on the bottom layer and that effectively tents them.

I normally also place a via directly behind or next to all shunt RF components.  The farther the ground via is away the worse the phase relationship of that part is to an ideal model.  If the ground is close by then the matching solution is a little more predictable.

[JoE1205]

More stitches and all without thermals, including crystal and nrf pad (managed to include 9 vias.)

[AmbystomaLabs]

Looks good.  The only thing left is the traces between RF components are rather narrow.  Now sometimes this is by design or sometimes it is just impossible to have characterized traces between the RF components or sometimes it just doesn't matter since the whole thing gets matched anyway.

On the reference design the traces between the components on the nRF output match look to be about the same as the pad width.  This is a pretty standard practice that gives a less inductive trace while still meeting the trace/space spec for the board.

Anyway, if you feel they are close to the reference designs for both the antenna and the nRF then run with it as is, otherwise I would fatten them up to closer to the width of the pad as long as you don't create spacing violations.

After that make sure your DRC rules match your board vendors spec and run with it.  Looks fine to me.

[JoE1205]

I adjusted the width of all traces to the pads width without spacing violations.

Thank you so much for guiding me through this.
Not really looking forward to solder this since 0402 is really painful.
Anyway I going to give reply when everything is tested and working perfectly obviously.