understanding the concept of INTENSET and how it's used along with NVIC for configuring interrupts

Trying to understand how interrupts work on nRF52: does setting an INTENSET register of the said peripheral enable the interrupt, and to propagate the interrupt over the Cortex M4, the NVIC_ISERx register needs to be set as well?

Is the idea similar to the depiction below where INTENSET is a part of the EXTI?

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