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TIMER1 compare not triggered for CC=0x00

I am using a TIMER1 compare event to generate an interrupt. Generally the code all works fine, but I have noticed some strange behaviour when loading the CC register with 0x00. If the timer is allowed to run freely and overflow, then it is possible to generate a compare event when the timer rolls-over to 0. No problem there. But then I tried to limit the maximum timer count using;

NRF_TIMER1->SHORTS |= TIMER_SHORTS_COMPARE2_CLEAR_Enabled << TIMER_SHORTS_COMPARE2_CLEAR_Pos;
NRF_TIMER1->CC[2] = T1_TICKS_MAX;

My understanding is that this should cause the timer to reset to zero when it hits the value in CC2 (T1_TICKS_MAX). However, when I do this I no longer get any compare events generated for CC=0x00. Any other CC value less than or equal to T1_TICKS_MAX works fine.

This seems a bit unexpected to me. Is this normal behaviour? Or do I perhaps have a bug in my code somewhere?

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  • I am not sure what you are trying to achive here. Why do you need SHORT to clear timer in this case? What is the value of T1_TICKS_MAX? if it is 0XFFFF Then you do not need that short, it will overflow and the next counter value will be zero anyway.

    If you enable clear_short at 0XFFFF, i think the short logic conflicts with the event logic at the same HFCLK cycle and looks like the event is missed. In my opinion, this is expected to be unpredictable in this case.

  • It is good way (and possible only way) to disable compare event if you do not want to stop the timer. (be careful of the corner cases, where the running timer is too close to CC value and would hit compare event while your logic decides to disable and writes to 0XFF to CC register)

    You are using one CC0 for setting max timer roll over value and other CC1 to generate events. For your event to be generate at CC1-> 0 case, you can do this.

    When your % operation gives 0, change CC0 to oXFD and set CC1 to 1 if % operation does not give 0, then CC0 should be written with 0XFE That should give you same timing and the event generation will be guarenteed as the timer is will be incremented to 1 like RK mentioned. Just out of curiousity, why are you using 8-bit mode?

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  • It is good way (and possible only way) to disable compare event if you do not want to stop the timer. (be careful of the corner cases, where the running timer is too close to CC value and would hit compare event while your logic decides to disable and writes to 0XFF to CC register)

    You are using one CC0 for setting max timer roll over value and other CC1 to generate events. For your event to be generate at CC1-> 0 case, you can do this.

    When your % operation gives 0, change CC0 to oXFD and set CC1 to 1 if % operation does not give 0, then CC0 should be written with 0XFE That should give you same timing and the event generation will be guarenteed as the timer is will be incremented to 1 like RK mentioned. Just out of curiousity, why are you using 8-bit mode?

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