SPI NOR peripheral restart

[PieterJericho]

Hi 

I have an external NOR flash chip which is powered off on startup. The idea is to power up the flash when needed to reserve power. On startup, I get the error message:

<err> spi_nor: SFDP magic ffffffff invalid
<err> spi_nor: SFDP read failed: -22

Enabling the power pin only starts during application code, meaning SPI-NOR fails before that.

Is there a way to restart the SPI-NOR instance or driver to re-attempt initializing the device?

I have had limited success by reorganizing boot priorities to have GPIO start before SPI, but what about the case where I have to reinitialize during runtime?

I have also tried remounting the fstab entry, but it doesn't seem to do anything to the SPI situation.

I appreciate any guidance regarding this

[Vidar Berg]

It's difficult to properly test this on my end with the dev kits I have. But I see you tagged the ticket with nrf52840, is it an option to use the QSPI? The QSPI NOR driver supports PM device states and will put the flash IC into DPM (deep power-down mode) on suspend.

[PieterJericho]

Unfortunately, I have the SST26VF032BT-104I/SM, which has QSPI disabled on power-up. I couldn't get quad-enable-requirements to work, but in retrospect, perhaps using the resume/suspend workflow it could work. Or is that not what quad-enable-requirements are for?

ww1.microchip.com/.../SST26VF032B-SST26VF032BA-Data-Sheet-DS20005218J.pdf

[Simonr]

Hi

Vidar asked me to take a look at your ticket. It should indeed be possible to enable the Quad I/O with the EQIO instruction. Afterwards you have to remember that all instructions are expected to 4-bit multiplexed, and if you're able to use the QSPI NOR driver, putting the flash IC into deep power-down mode as Vidar suggests on suspends, that should be the best way to reduce current consumption as far as I can tell.

Can you tell me more about what is happening on your end when you try to get the quad requirements to work?

Best regards,

Simon

[PieterJericho]

Hi Simonr 

Not one of the quad-enablements options work. All return something resembling the below

qspi_nor: qspi_nrfx_configure: RDSR 08 QE 0 need 0: no-change

Specifying NONE doesn't produce any additional logs, but the boot process doesn't progress.

I have defined a fixed regulator on the supply pins, and it works for the spi-nor setup to get power on startup, but not for QSPI at all. There also isn't a vin_supply option for qspi or nordic, qspi-nor. Even so, I set the init priority for gpio and the regulator to 0, and I can see it is setup before qspi starts.

[Simonr]

Hi

I would recommend trying to get the QSPI to work, as the DPM should be the best way to achieve what you're describing I think. What nRF Connect SDK version are you developing on? Can you show me the .dts overlay file when trying to set up the QSPI, and how it's set up in your application file(s). On the overlay side of things it should look something like this, with different JEDEC ID, size, name, etc.

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	mx25r64: mx25r6435f@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* MX25R64 supports only pp and pp4io */
		writeoc = "pp4io";
		/* MX25R64 supports all readoc options */
		readoc = "read4io";
		sck-frequency = <8000000>;
		label = "MX25R64";
		jedec-id = [c2 28 17];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
		];
		size = <67108864>;
		has-dpd;
		t-enter-dpd = <10000>;
		t-exit-dpd = <35000>;
	};
};

Best regards,

Simon