Enabling pins P0.0, P0.1, P0.2, P0.3, and P0.19 as GPIO [NRF5340]

Hey y'all,

I'm having trouble enabling these pins as GPIO for our custom nrf5340 board, and from reading around, it's not clear to me as a beginner how to properly configure these pins.

Pins  P0.0 and P0.1 are usually used to operate an oscillator, but our board doesn't need it and instead these pins should operate as GPIO pins. My understanding is that to enable these pins, I need to operate the chip with the internal oscillator which I can do with the following lines in my proj.conf.

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n

Pins P0.2 and P0.3 are typically used for an NFC antenna, but again, our board doesn't need this functionality and these pins should be configured to be used as GPIO. My understanding is that all I need to do is add the following line to my proj.conf. 

I've read that these pins can only be used in a "secure domain", but I've tried creating different projects types (nrf5340dk_nrf5340_cpuapp_ns and nrf5340dk_nrf5340_cpuapp) and running them to no success. There is probably a misunderstanding here on my part. I get the same results as the following link (https://devzone.nordicsemi.com/f/nordic-q-a/94197/config_nfct_pins_as_gpios-y-doesn-t-work). Please direct me to resources to deepen my understanding of a secure domain so I can fix the issue.

CONFIG_NFCT_PINS_AS_GPIOS=y

Pin P.019 is the most confusing to me. On the dev kit, this pin along with pins P0.20, P0.21, P0.22 are used to make a virtual com port. Other than that though, from the manual, it seems like a normal GPIO pin with no other functionalities. It is unclear to me why this pin is not working. I've done my best to verify that the hardware and connections for this pin on the custom board are working. I'm also unable to toggle this pin on the dev board, despite making the needed physical changes to do so. Is there a setting to enable this particular pin?

If it helps, I'm using VSCode on Ubuntu.

Thanks for the help. I've included the full proj.conf and the overlay file below.

CONFIG_GPIO=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n

# I2C
CONFIG_I2C=y
CONFIG_NRFX_TWIM1=y

CONFIG_PRINTK=y


# Rebooot
CONFIG_REBOOT=n
CONFIG_RESET_ON_FATAL_ERROR=n

CONFIG_NFCT_PINS_AS_GPIOS=y

// To get started, press Ctrl+Space to bring up the completion menu and view the available nodes.

// You can also use the buttons in the sidebar to perform actions on nodes.
// Actions currently available include:

// * Enabling / disabling the node
// * Adding the bus to a bus
// * Removing the node
// * Connecting ADC channels

// For more help, browse the DeviceTree documentation at https://docs.zephyrproject.org/latest/guides/dts/index.html
// You can also visit the nRF DeviceTree extension documentation at https://nrfconnect.github.io/vscode-nrf-connect/devicetree/nrfdevicetree.html
/ {
	userpins {
		compatible = "gpio-keys";
		ex1: ex_1 {
			gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 1";
		};
		ex2: ex_2 {
			gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 2";
		};
		ex3: ex_3 {
			gpios = <&gpio0 22 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 3";
		};
		ex4: ex_4 {
			gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 4";
		};
		ex5: ex_5 {
			gpios = <&gpio0 24 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 5";
		};
		ex6: ex_6 {
			gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 6";
		};
		ex7: ex_7 {
			gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 7";
		};
		ex8: ex_8 {
			gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 8";
		};
		ex9: ex_9 {
			gpios = <&gpio0 28 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 9";
		};
		ex10: ex_10 {
			gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 10";
		};
		ex11: ex_11 {
			gpios = <&gpio0 30 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 11";
		};
		ex12: ex_12 {
			gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "External pin 12";
		};
		enl: en_l {
			gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Enable LED Mux";
		};
		mux0: mux_0 {
			gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "LED Mux select 0";
		};
		mux1: mux_1 {
			gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "LED Mux select 1";
		};
		mux2: mux_2 {
			gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "LED Mux select 2";
		};
		smux0: smux_0 {
			gpios = <&gpio1 8 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Stepper Mux select 0";
		};
		smux1: smux_1 {
			gpios = <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Stepper Mux select 1";
		};
		smux2: smux_2 {
			gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Stepper Mux select 2";
		};
		smux3: smux_3 {
			gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Stepper Mux select 3";
		};
		ens: en_s {
			gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Enable stepper motors";
		};
		clks: clk_s {
			gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Clock for stepper motors";
		};
		steps: step_s {
			gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Step pin for stepper motors";
		};
		dirs: dir_s {
			gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Dir pin for stepper motors";
		};
		mmux0: mmux_0 {
			gpios = <&gpio0 13 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Misc mux select 0";
		};
		mmux1: mmux_1 {
			gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Misc mux select 1";
		};
		mmux2: mmux_2 {
			gpios = <&gpio0 15 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Misc mux select 2";
		};
		clkm: clk_m {
			gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Clock for miscellaneous";
		};
		miscm: misc_m {
			gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Misc input";
		};
		lmux0: lmux_0 {
			gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Limit mux select 0";
		};
		lmux1: lmux_1 {
			gpios = <&gpio0 17 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Limit mux select 1";
		};
		lmux2: lmux_2 {
			gpios = <&gpio0 18 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Limit mux select 2";
		};
		lmux3: lmux_3 {
			gpios = <&gpio0 19 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Limit mux select 3";
		};
		lmt: lmt {
			gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Limit pin";
		};
		serv0: serv_0 {
			gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Servo 0 pin";
		};
		serv1: serv_1 {
			gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Servo 1 pin";
		};
		serv2: serv_2 {
			gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Servo 2 pin";
		};
		serv3: serv_3 {
			gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_VOLTAGE_3P3)>;
			label = "Servo 3 pin";
		};
	};
};

&i2c1 {
	status = "okay";
	compatible = "nordic,nrf-twim";
	label = "I2C_1";
	pinctrl-0 = <&i2c1_default>;
	pinctrl-1 = <&i2c1_sleep>;
	pinctrl-names = "default", "sleep";
	clock-frequency = <100000>; 

	bh1749: bh1749@38 {
		compatible = "rohm,bh1749";
		label = "BH1749";
		reg = <0x38>;
		int-gpios = <&gpio0 27 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
	};

	tca9548: tca9548a@70 {
		compatible = "ti,tca9548a";
		label = "TCA9548";
		reg = <0x70>;
	};
};

&pinctrl {
	i2c1_default: i2c1_default{
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 35)>,
				<NRF_PSEL(TWIM_SCL, 0, 34)>;
		};
	};

	i2c1_sleep: i2c1_sleep{
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 35)>,
				<NRF_PSEL(TWIM_SCL, 0, 34)>;
			low-power-enable;
		};
	};
};

Parents
  • Hi

    The build targets nrf5340dk_nrf5340_cpuapp_ns and nrf5340dk_nrf5340_cpuapp are created specifically for our developement kits.
    What you are experiencing is likely because these are configured to use the pins you need for something else.
    While we could try to figure out what that is, I instead suggest another approach:
    Since you use a custom board, you should sooner or later create your own custom build target to fit that custom board.
    If you do so, I bet that this issue will disappear.

    Our VS Code extension has a feature to create a new board. Also see Board Support.

    Regards,
    Sigurd Hellesvik

  • Thanks for the reply! I'll look into it and get back to y'all. This is my first non-atmega project, so a bit of a learning curve. Having fun though

  • DubiousDooby said:
    This is my first non-atmega project, so a bit of a learning curve. Having fun though

    Good to hear!

    In that case, I highly advise that you have a look at our guides at https://academy.nordicsemi.com, especially the "getting started with nRF Connect SDK" there.
    I think it is very good.

  • Thanks for the advice and links. I did my best to read them and follow them closely. I had already completed the Nordic Dev Academy prior to posting. It was a great help.

    Unfortunately I've been unable to create my own board files. I went through the dts files of the semi-working project (the one where some of the pins don't work) to create the files. I've included the relevant files below. I'm getting the following error, which I assume is happening because I didn't make my board files properly. Please let me know where my understanding might be breaking down.

    ...

    [150/162] Building C object zephyr/kernel/CMakeFiles/kernel.dir/timeout.c.obj
    [151/162] Linking C static library zephyr/kernel/libkernel.a
    [152/162] Linking C executable zephyr/zephyr_pre0.elf
    FAILED: zephyr/zephyr_pre0.elf zephyr/zephyr_pre0.map
    : && ccache /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc  -gdwarf-4 zephyr/CMakeFiles/zephyr_pre0.dir/misc/empty_file.c.obj -o zephyr/zephyr_pre0.elf  -fuse-ld=bfd  -Wl,-T  zephyr/linker_zephyr_pre0.cmd  -Wl,-Map=/home/james/org/work/nrf/ncs_projects/blinky/build/zephyr/zephyr_pre0.map  -Wl,--whole-archive  app/libapp.a  zephyr/libzephyr.a  zephyr/arch/common/libarch__common.a  zephyr/arch/arch/arm/core/aarch32/libarch__arm__core__aarch32.a  zephyr/arch/arch/arm/core/aarch32/cortex_m/libarch__arm__core__aarch32__cortex_m.a  zephyr/arch/arch/arm/core/aarch32/cortex_m/cmse/libarch__arm__core__aarch32__cortex_m__cmse.a  zephyr/arch/arch/arm/core/aarch32/mpu/libarch__arm__core__aarch32__mpu.a  zephyr/lib/libc/minimal/liblib__libc__minimal.a  zephyr/soc/arm/common/cortex_m/libsoc__arm__common__cortex_m.a  zephyr/drivers/clock_control/libdrivers__clock_control.a  zephyr/drivers/i2c/libdrivers__i2c.a  zephyr/drivers/timer/libdrivers__timer.a  modules/nrf/drivers/hw_cc310/lib..__nrf__drivers__hw_cc310.a  modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a  -Wl,--no-whole-archive  zephyr/kernel/libkernel.a  zephyr/CMakeFiles/offsets.dir/./arch/arm/core/offsets/offsets.c.obj  -L"/home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/thumb/v8-m.main/nofp"  -L/home/james/org/work/nrf/ncs_projects/blinky/build/zephyr  -lgcc  zephyr/arch/common/libisr_tables.a  -mcpu=cortex-m33  -mthumb  -mabi=aapcs  -Wl,--gc-sections  -Wl,--build-id=none  -Wl,--sort-common=descending  -Wl,--sort-section=alignment  -Wl,-u,_OffsetAbsSyms  -Wl,-u,_ConfigAbsSyms  -nostdlib  -static  -Wl,-X  -Wl,-N  -Wl,--orphan-handling=warn  -Wl,-no-pie  /home/james/ncs/v2.4.0/nrfxlib/crypto/nrf_cc312_platform/lib/cortex-m33/soft-float/no-interrupts/libnrf_cc312_platform_0.9.17.a && cd /home/james/org/work/nrf/ncs_projects/blinky/build/zephyr && /home/james/ncs/toolchains/1f9b40e71a/usr/local/bin/cmake -E echo
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: app/libapp.a(main.c.obj): in function `main':
    /home/james/org/work/nrf/ncs_projects/blinky/src/main.c:82: undefined reference to `__device_dts_ord_92'
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: app/libapp.a(main.c.obj):(.rodata.lmt_0+0x0): undefined reference to `__device_dts_ord_92'
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: app/libapp.a(main.c.obj):(.rodata.lmux_3+0x0): undefined reference to `__device_dts_ord_92'
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: app/libapp.a(main.c.obj):(.rodata.lmux_2+0x0): undefined reference to `__device_dts_ord_92'
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: app/libapp.a(main.c.obj):(.rodata.lmux_1+0x0): undefined reference to `__device_dts_ord_92'
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: app/libapp.a(main.c.obj):(.rodata.lmux_0+0x0): more undefined references to `__device_dts_ord_92' follow
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: zephyr/drivers/i2c/libdrivers__i2c.a(i2c_nrfx_twim.c.obj): in function `pinctrl_apply_state':
    /home/james/ncs/v2.4.0/zephyr/include/zephyr/drivers/pinctrl.h:348: undefined reference to `pinctrl_lookup_state'
    /home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd: zephyr/drivers/i2c/libdrivers__i2c.a(i2c_nrfx_twim.c.obj): in function `pinctrl_apply_state_direct':
    /home/james/ncs/v2.4.0/zephyr/include/zephyr/drivers/pinctrl.h:329: undefined reference to `pinctrl_configure_pins'
    collect2: error: ld returned 1 exit status
    ninja: build stopped: subcommand failed.
    FATAL ERROR: command exited with status 1: /home/james/ncs/toolchains/1f9b40e71a/usr/local/bin/cmake --build /home/james/org/work/nrf/ncs_projects/blinky/build

    main.c

    /*
     * Copyright (c) 2016 Intel Corporation
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    
    #include <zephyr/kernel.h>
    #include <zephyr/drivers/gpio.h>
    #include <zephyr/zephyr.h>
    #include <zephyr/drivers/i2c.h>
    #include <zephyr/drivers/pinctrl.h>
    #include <zephyr/device.h>
    
    /* 1000 msec = 1 sec */
    #define SLEEP_TIME_MS   1000
    
    /*
     * A build error on this line means your board is unsupported.
     * See the sample documentation for information on how to fix this.
     */
    #define LMUX0_NODE DT_NODELABEL(lmux0)
    #define LMUX1_NODE DT_NODELABEL(lmux1)
    #define LMUX2_NODE DT_NODELABEL(lmux2)
    #define LMUX3_NODE DT_NODELABEL(lmux3)
    #define LMT_NODE DT_NODELABEL(lmt)
    
    static const struct gpio_dt_spec lmux_0 = GPIO_DT_SPEC_GET_OR(LMUX0_NODE, gpios, {0});
    static const struct gpio_dt_spec lmux_1 = GPIO_DT_SPEC_GET_OR(LMUX1_NODE, gpios, {0});
    static const struct gpio_dt_spec lmux_2 = GPIO_DT_SPEC_GET_OR(LMUX2_NODE, gpios, {0});
    static const struct gpio_dt_spec lmux_3 = GPIO_DT_SPEC_GET_OR(LMUX3_NODE, gpios, {0});
    static const struct gpio_dt_spec lmt_0 = GPIO_DT_SPEC_GET_OR(LMT_NODE, gpios, {0});
    
    int main(void)
    {
    	int ret;
    
    	if (!device_is_ready(lmux_0.port)) {
    		return -1;
    	}
    	if (!device_is_ready(lmux_1.port)) {
    		return -1;
    	}
    	if (!device_is_ready(lmux_2.port)) {
    		return -1;
    	}
    	if (!device_is_ready(lmux_3.port)) {
    		return -1;
    	}
    	if (!device_is_ready(lmt_0.port)) {
    		return -1;
    	}
    
    	ret = gpio_pin_configure_dt(&lmux_0, GPIO_OUTPUT_LOW);
    	if (ret < 0) {
    		return ret;
    	}
    	ret = gpio_pin_configure_dt(&lmux_1, GPIO_OUTPUT_LOW);
    	if (ret < 0) {
    		return ret;
    	}
    	ret = gpio_pin_configure_dt(&lmux_2, GPIO_OUTPUT_LOW);
    	if (ret < 0) {
    		return ret;
    	}
    	ret = gpio_pin_configure_dt(&lmux_3, GPIO_OUTPUT_LOW);
    	if (ret < 0) {
    		return ret;
    	}
    	ret = gpio_pin_configure_dt(&lmt_0, GPIO_INPUT);
    	if (ret < 0) {
    		return ret;
    	}
    
    	while (1) {
    		ret = gpio_pin_toggle_dt(&lmux_3);
    		if (ret < 0) {
    			return 0;
    		}
    		k_msleep(SLEEP_TIME_MS);
    	}
    	return 0;
    }
    

    nrf5340_tricca_board.dts

    /dts-v1/;
    
    #include <nordic/nrf5340_cpuapp_qkaa.dtsi>
    #include <nordic/nrf5340_tricca_board.dtsi>
    / {
    	model = "nrf5340 Tricca Board";
    	compatible = "tricca-technologies-inc-,nrf5340-tricca-board";
    
    	chosen {
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    		zephyr,console = &uart0;
    		zephyr,shell-uart = &uart0;
    		zephyr,uart-mcumgr = &uart0;
    		zephyr,bt-mon-uart = &uart0;
    		zephyr,bt-c2h-uart = &uart0;
    		zephyr,bt-hci-rpmsg-ipc = &ipc0;
    		nordic,802154-spinel-ipc = &ipc0;
    		zephyr,ieee802154 = &ieee802154;
    		/* shared memory reserved for the inter-processor communication */
    		zephyr,ipc_shm = &sram0_shared;
    	};
    
    	reserved-memory {
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges;
    
    		sram0_image: image@20000000 {
    			/* Zephyr image(s) memory */
    		};
    
    		sram0_s: image_s@20000000 {
    			/* Secure image memory */
    		};
    
    		sram0_ns: image_ns@20040000 {
    			/* Non-Secure image memory */
    		};
    
    		sram0_shared: memory@20070000 {
    			/* SRAM allocated to shared memory */
    			reg = <0x20070000 0x10000>;
    		};
    	};
    };
    
    &gpio0 {
    	status = "okay";
    };
    
    &gpio1 {
    	status = "okay";
    };
    
    &i2c1 {
    	compatible = "nordic,nrf-twim";
    	status = "okay";
    	pinctrl-0 = <&i2c1_default>;
    	pinctrl-1 = <&i2c1_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &flash0 {
    
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		boot_partition: partition@0 {
    			label = "mcuboot";
    			reg = <0x00000000 0x00010000>;
    		};
    		slot0_partition: partition@10000 {
    			label = "image-0";
    		};
    		slot0_ns_partition: partition@50000 {
    			label = "image-0-nonsecure";
    		};
    		slot1_partition: partition@80000 {
    			label = "image-1";
    		};
    		slot1_ns_partition: partition@c0000 {
    			label = "image-1-nonsecure";
    		};
    		/* 0xf0000 to 0xf7fff reserved for TF-M partitions */
    		storage_partition: partition@f8000 {
    			label = "storage";
    			reg = <0x000f8000 0x00008000>;
    		};
    	};
    };
    
    &ieee802154 {
    	status = "okay";
    };
    
    &slot0_partition {
    	reg = <0x00010000 0x40000>;
    };
    
    &slot0_ns_partition {
    	reg = <0x00050000 0x30000>;
    };
    
    &slot1_partition {
    	reg = <0x00080000 0x40000>;
    };
    
    &slot1_ns_partition {
    	reg = <0x000c0000 0x30000>;
    };
    
    &sram0_image {
    	reg = <0x20000000 DT_SIZE_K(448)>;
    };
    
    &sram0_s {
    	reg = <0x20000000 0x40000>;
    };
    
    &sram0_ns {
    	reg = <0x20040000 0x30000>;
    };
    

    nrf5340_tricca_board.overlay

    // To get started, press Ctrl+Space to bring up the completion menu and view the available nodes.
    
    // You can also use the buttons in the sidebar to perform actions on nodes.
    // Actions currently available include:
    
    // * Enabling / disabling the node
    // * Adding the bus to a bus
    // * Removing the node
    // * Connecting ADC channels
    
    // For more help, browse the DeviceTree documentation at https://docs.zephyrproject.org/latest/guides/dts/index.html
    // You can also visit the nRF DeviceTree extension documentation at https://nrfconnect.github.io/vscode-nrf-connect/devicetree/nrfdevicetree.html
    / {
    	userpins {
    		compatible = "gpio-keys";
    		ex1: ex_1 {
    			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
    			label = "External pin 1";
    		};
    		ex2: ex_2 {
    			gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
    			label = "External pin 2";
    		};
    		ex3: ex_3 {
    			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
    			label = "External pin 3";
    		};
    		ex4: ex_4 {
    			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
    			label = "External pin 4";
    		};
    		ex5: ex_5 {
    			gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
    			label = "External pin 5";
    		};
    		ex6: ex_6 {
    			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
    			label = "External pin 6";
    		};
    		ex7: ex_7 {
    			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
    			label = "External pin 7";
    		};
    		ex8: ex_8 {
    			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
    			label = "External pin 8";
    		};
    		ex9: ex_9 {
    			gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
    			label = "External pin 9";
    		};
    		ex10: ex_10 {
    			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
    			label = "External pin 10";
    		};
    		ex11: ex_11 {
    			gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
    			label = "External pin 11";
    		};
    		ex12: ex_12 {
    			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
    			label = "External pin 12";
    		};
    		enl: en_l {
    			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
    			label = "Enable LED Mux";
    		};
    		mux0: mux_0 {
    			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
    			label = "LED Mux select 0";
    		};
    		mux1: mux_1 {
    			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
    			label = "LED Mux select 1";
    		};
    		mux2: mux_2 {
    			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
    			label = "LED Mux select 2";
    		};
    		smux0: smux_0 {
    			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
    			label = "Stepper Mux select 0";
    		};
    		smux1: smux_1 {
    			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
    			label = "Stepper Mux select 1";
    		};
    		smux2: smux_2 {
    			gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
    			label = "Stepper Mux select 2";
    		};
    		smux3: smux_3 {
    			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
    			label = "Stepper Mux select 3";
    		};
    		ens: en_s {
    			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
    			label = "Enable stepper motors";
    		};
    		clks: clk_s {
    			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
    			label = "Clock for stepper motors";
    		};
    		steps: step_s {
    			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
    			label = "Step pin for stepper motors";
    		};
    		dirs: dir_s {
    			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
    			label = "Dir pin for stepper motors";
    		};
    		mmux0: mmux_0 {
    			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
    			label = "Misc mux select 0";
    		};
    		mmux1: mmux_1 {
    			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
    			label = "Misc mux select 1";
    		};
    		mmux2: mmux_2 {
    			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
    			label = "Misc mux select 2";
    		};
    		clkm: clk_m {
    			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
    			label = "Clock for miscellaneous";
    		};
    		miscm: misc_m {
    			gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
    			label = "Misc input";
    		};
    		lmux0: lmux_0 {
    			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
    			label = "Limit mux select 0";
    		};
    		lmux1: lmux_1 {
    			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
    			label = "Limit mux select 1";
    		};
    		lmux2: lmux_2 {
    			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
    			label = "Limit mux select 2";
    		};
    		lmux3: lmux_3 {
    			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
    			label = "Limit mux select 3";
    		};
    		lmt: lmt {
    			gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
    			label = "Limit pin";
    		};
    		serv0: serv_0 {
    			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
    			label = "Servo 0 pin";
    		};
    		serv1: serv_1 {
    			gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
    			label = "Servo 1 pin";
    		};
    		serv2: serv_2 {
    			gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
    			label = "Servo 2 pin";
    		};
    		serv3: serv_3 {
    			gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
    			label = "Servo 3 pin";
    		};
    	};
    };
    
    &i2c1 {
    	status = "okay";
    	compatible = "nordic,nrf-twim";
    	label = "I2C_1";
    	pinctrl-0 = <&i2c1_default>;
    	pinctrl-1 = <&i2c1_sleep>;
    	pinctrl-names = "default", "sleep";
    	clock-frequency = <100000>;
    
    	bh1749: bh1749@38 {
    		compatible = "rohm,bh1749";
    		label = "BH1749";
    		reg = <0x38>;
    		int-gpios = <&gpio0 27 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
    	};
    
    	tca9548: tca9548a@70 {
    		compatible = "ti,tca9548a";
    		label = "TCA9548";
    		reg = <0x70>;
    	};
    };
    
    &pinctrl {
    	i2c1_default: i2c1_default{
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 35)>,
    				<NRF_PSEL(TWIM_SCL, 0, 34)>;
    		};
    	};
    
    	i2c1_sleep: i2c1_sleep{
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 35)>,
    				<NRF_PSEL(TWIM_SCL, 0, 34)>;
    			low-power-enable;
    		};
    	};
    };
    
    

    nrf5340_tricca_board.dtsi

    &pinctrl {
    	i2c1_default: i2c1_default {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
    				<NRF_PSEL(TWIM_SCL, 1, 3)>;
    		};
    	};
    
    	i2c1_sleep: i2c1_sleep {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
    				<NRF_PSEL(TWIM_SCL, 1, 3)>;
    			low-power-enable;
    		};
    	};
    
    	uart0_default: uart0_default {
    		group1 {
    			psels = <NRF_PSEL(UART_TX, 0, 20)>,
    				<NRF_PSEL(UART_RTS, 0, 19)>;
    		};
    		group2 {
    			psels = <NRF_PSEL(UART_RX, 0, 22)>,
    				<NRF_PSEL(UART_CTS, 0, 21)>;
    			bias-pull-up;
    		};
    	};
    
    	uart0_sleep: uart0_sleep {
    		group1 {
    			psels = <NRF_PSEL(UART_TX, 0, 20)>,
    				<NRF_PSEL(UART_RX, 0, 22)>,
    				<NRF_PSEL(UART_RTS, 0, 19)>,
    				<NRF_PSEL(UART_CTS, 0, 21)>;
    			low-power-enable;
    		};
    	};
    
    	uart1_default: uart1_default {
    		group1 {
    			psels = <NRF_PSEL(UART_TX, 1, 1)>;
    		};
    		group2 {
    			psels = <NRF_PSEL(UART_RX, 1, 0)>;
    			bias-pull-up;
    		};
    	};
    
    	uart1_sleep: uart1_sleep {
    		group1 {
    			psels = <NRF_PSEL(UART_TX, 1, 1)>,
    				<NRF_PSEL(UART_RX, 1, 0)>;
    			low-power-enable;
    		};
    	};
    
    };
    
    

  • DubiousDooby said:
    I went through the dts files of the semi-working project (the one where some of the pins don't work) to create the files.

    Maybe try to get inspiration from our DK boardfiles also? https://github.com/nrfconnect/sdk-zephyr/tree/main/boards/arm

    Can you zip and upload your whole "nrf5340_tricca_board/" directory, so I can have a look at all of it?

  • Hello and thanks for your patience. I redid the files and tried to take inspiration from the DK boardfiles you linked. I'm getting a similar but different error. It's complaining about not being able to find sram0. It's probably a bad sign that I have to mess with memory so I stopped once I got the following error.

     *  Executing task: nRF Connect: Build [pristine]: blinkysupreme/build (active) 
    
    Building blinkysupreme
    /bin/sh -c west build --build-dir /home/james/org/work/nrf/ncs_projects/blinkysupreme/build /home/james/org/work/nrf/ncs_projects/blinkysupreme --pristine --board tricca_tritant_v1 --no-sysbuild -- -DNCS_TOOLCHAIN_VERSION:STRING="NONE" -DBOARD_ROOT:STRING="/home/james/ncs/v2.1.0/zephyr/boards/arm;/home/james/ncs/v2.4.0/zephyr" -DCONFIG_DEBUG_OPTIMIZATIONS:STRING="y" -DCONFIG_DEBUG_THREAD_INFO:STRING="y" -DDTC_OVERLAY_FILE:STRING="/home/james/org/work/nrf/ncs_projects/blinkysupreme/tricca_tritant_v1.overlay" -DCONF_FILE:STRING="/home/james/org/work/nrf/ncs_projects/blinkysupreme/prj.conf"
    
    -- west build: generating a build system
    Loading Zephyr default modules (Zephyr base).
    -- Application: /home/james/org/work/nrf/ncs_projects/blinkysupreme
    -- CMake version: 3.20.5
    -- Found Python3: /home/james/ncs/toolchains/1f9b40e71a/usr/local/bin/python3.8 (found suitable exact version "3.8.2") found components: Interpreter 
    -- Cache files will be written to: /home/james/.cache/zephyr
    -- Zephyr version: 3.3.99 (/home/james/ncs/v2.4.0/zephyr)
    -- Found west (found suitable version "1.0.0", minimum required is "0.7.1")
    -- Board: tricca_tritant_v1
    -- Found host-tools: zephyr 0.16.0 (/home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk)
    -- Found toolchain: zephyr 0.16.0 (/home/james/ncs/toolchains/1f9b40e71a/opt/zephyr-sdk)
    -- Found Dtc: /home/james/ncs/toolchains/1f9b40e71a/usr/bin/dtc (found suitable version "1.4.7", minimum required is "1.4.6") 
    -- Found BOARD.dts: /home/james/ncs/v2.4.0/zephyr/boards/arm/tricca_tritant_v1/tricca_tritant_v1.dts
    -- Found devicetree overlay: /home/james/org/work/nrf/ncs_projects/blinkysupreme/tricca_tritant_v1.overlay
    devicetree error: /ipc/ipc0: undefined node label 'sram0_shared'
    -- In: /home/james/org/work/nrf/ncs_projects/blinkysupreme/build/zephyr, command: /home/james/ncs/toolchains/1f9b40e71a/usr/local/bin/python3.8;/home/james/ncs/v2.4.0/zephyr/scripts/dts/gen_defines.py;--dts;/home/james/org/work/nrf/ncs_projects/blinkysupreme/build/zephyr/zephyr.dts.pre;--dtc-flags;'';--bindings-dirs;/home/james/ncs/v2.4.0/nrf/dts/bindings;/home/james/ncs/v2.4.0/zephyr/dts/bindings;--header-out;/home/james/org/work/nrf/ncs_projects/blinkysupreme/build/zephyr/include/generated/devicetree_generated.h.new;--dts-out;/home/james/org/work/nrf/ncs_projects/blinkysupreme/build/zephyr/zephyr.dts.new;--edt-pickle-out;/home/james/org/work/nrf/ncs_projects/blinkysupreme/build/zephyr/edt.pickle;--vendor-prefixes;/home/james/ncs/v2.4.0/nrf/dts/bindings/vendor-prefixes.txt;--vendor-prefixes;/home/james/ncs/v2.4.0/zephyr/dts/bindings/vendor-prefixes.txt
    CMake Error at /home/james/ncs/v2.4.0/zephyr/cmake/modules/dts.cmake:276 (message):
      gen_defines.py failed with return code: 1
    Call Stack (most recent call first):
      /home/james/ncs/v2.4.0/zephyr/cmake/modules/zephyr_default.cmake:115 (include)
      /home/james/ncs/v2.4.0/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)
      /home/james/ncs/v2.4.0/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)
      CMakeLists.txt:4 (find_package)
    
    
    -- Configuring incomplete, errors occurred!
    FATAL ERROR: command exited with status 1: /home/james/ncs/toolchains/1f9b40e71a/usr/local/bin/cmake -DWEST_PYTHON=/home/james/ncs/toolchains/1f9b40e71a/usr/local/bin/python3.8 -B/home/james/org/work/nrf/ncs_projects/blinkysupreme/build -GNinja -DBOARD=tricca_tritant_v1 -DNCS_TOOLCHAIN_VERSION:STRING=NONE '-DBOARD_ROOT:STRING=/home/james/ncs/v2.1.0/zephyr/boards/arm;/home/james/ncs/v2.4.0/zephyr' -DCONFIG_DEBUG_OPTIMIZATIONS:STRING=y -DCONFIG_DEBUG_THREAD_INFO:STRING=y -DDTC_OVERLAY_FILE:STRING=/home/james/org/work/nrf/ncs_projects/blinkysupreme/tricca_tritant_v1.overlay -DCONF_FILE:STRING=/home/james/org/work/nrf/ncs_projects/blinkysupreme/prj.conf -S/home/james/org/work/nrf/ncs_projects/blinkysupreme
    

    tricca_tritant_v1.zip

  • sram0_shared is defined in ncs/zephyr/boards/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dts

    And this file is somehow not included in your board files.
    I have looked a bit at them, but have not yet been able to figure out what is missing.
    However, with some searching for filenames should yield you how this is included.

    I will go on vacation next week, so if you continue this case, one of my colleagues will take over the supporting

Reply
  • sram0_shared is defined in ncs/zephyr/boards/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dts

    And this file is somehow not included in your board files.
    I have looked a bit at them, but have not yet been able to figure out what is missing.
    However, with some searching for filenames should yield you how this is included.

    I will go on vacation next week, so if you continue this case, one of my colleagues will take over the supporting

Children
  • Thanks mate. I've gone through the files to compile the missing definitions regarding sram and ipc. Basically, I went through the includes for the dev kit and added the missing memory definitions to my custom . This led me to get the same error that I got last time I did this. That problem was solved by putting CONFIG_PINCTRL=y in my proj.conf. If possible, I'd like a bit of background as to why this setting is needed. I can now compile code and upload it to my custom board.

    Unfortunately this did not solve my issue with enabling pins P0.0, P0.1, P0.2, P0.03 and P0.19 as GPIO, and this is despite having the settings to disable them (see above in initial post). I verified this with an oscilloscope and running code similar to that below. I've also included my zipped board files. Hope this helps, and please let me know what I can provide or read to help. Thanks again.

    /*
     * Copyright (c) 2016 Intel Corporation
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    
    #include <zephyr/kernel.h>
    #include <zephyr/drivers/gpio.h>
    
    /* 1000 msec = 1 sec */
    #define SLEEP_TIME_MS   1000
    #define SERV0_NODE DT_NODELABEL(serv0)
    #define EX10_NODE DT_NODELABEL(ex10)
    static const struct gpio_dt_spec serv0_dev = GPIO_DT_SPEC_GET_OR(SERV0_NODE, gpios, {0});
    static const struct gpio_dt_spec ex10 = GPIO_DT_SPEC_GET_OR(EX10_NODE, gpios, {0});
    
    int main(void)
    {
    	int ret;
    
    	if (!gpio_is_ready_dt(&serv0_dev)) {
    		return 0;
    	}
    
    	if (!gpio_is_ready_dt(&ex10)) {
    		return 0;
    	}
    
    	ret = gpio_pin_configure_dt(&serv0_dev, GPIO_OUTPUT_ACTIVE);
    	if (ret < 0) {
    		return 0;
    	}
    
    	ret = gpio_pin_configure_dt(&ex10, GPIO_OUTPUT_ACTIVE);
    	if (ret < 0) {
    		return 0;
    	}
    
    	while (1) {
    		ret = gpio_pin_toggle_dt(&serv0_dev);
    		if (ret < 0) {
    			return 0;
    		}
    		ret = gpio_pin_toggle_dt(&ex10);
    		if (ret < 0) {
    			return 0;
    		}
    		k_msleep(SLEEP_TIME_MS);
    	}
    	return 0;
    }

    // Copyright (c) 2023 Nordic Semiconductor ASA
    // SPDX-License-Identifier: Apache-2.0
    
    /dts-v1/;
    #include <nordic/nrf5340_cpuapp_qkaa.dtsi>
    #include "tricca_tritant_v1.dtsi"
    
    / {
    	model = "tricca-tritant-v1";
    	compatible = "tricca-technologies-inc-,tricca-tritant-v1";
    
    	chosen {
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    		/* shared memory reserved for the inter-processor communication */
    		zephyr,ipc_shm = &sram0_shared;
    	};
    
    	reserved-memory {
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges;
    
    		sram0_image: image@20000000 {
    			/* Zephyr image(s) memory */
    		};
    
    		sram0_s: image_s@20000000 {
    			/* Secure image memory */
    		};
    
    		sram0_ns: image_ns@20040000 {
    			/* Non-Secure image memory */
    		};
    
    		sram0_shared: memory@20070000 {
    			/* SRAM allocated to shared memory */
    			reg = <0x20070000 0x10000>;
    		};
    	};
    
    };
    
    &flash0 {
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		boot_partition: partition@0 {
    			label = "mcuboot";
    			reg = <0x0 0x10000>;
    		};
    		slot0_partition: partition@10000 {
    			label = "image-0";
    			reg = <0x10000 0x40000>;
    		};
    		slot0_ns_partition: partition@50000 {
    			label = "image-0-nonsecure";
    			reg = <0x50000 0x30000>;
    		};
    		slot1_partition: partition@80000 {
    			label = "image-1";
    			reg = <0x80000 0x40000>;
    		};
    		slot1_ns_partition: partition@c0000 {
    			label = "image-1-nonsecure";
    			reg = <0xc0000 0x30000>;
    		};
    		scratch_partition: partition@f0000 {
    			label = "image-scratch";
    			reg = <0xf0000 0xa000>;
    		};
    		storage_partition: partition@fa000 {
    			label = "storage";
    			reg = <0xfa000 0x6000>;
    		};
    	};
    };
    
    &gpio0 {
    	status = "okay";
    };
    
    &gpio1 {
    	status = "okay";
    };
    
    &i2c1 {
    	compatible = "nordic,nrf-twim";
    	status = "okay";
    	pinctrl-0 = <&i2c1_default>;
    	pinctrl-1 = <&i2c1_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    /*
     * Copyright (c) 2019-2020 Nordic Semiconductor ASA
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    
    /*
     * Default Flash planning for nrf5340dk_nrf5340 CPUAPP (Application MCU).
     *
     * Zephyr build for nRF5340 with ARM TrustZone-M support,
     * implies building Secure and Non-Secure Zephyr images.
     *
     * Secure image will be placed, by default, in flash0
     * (or in slot0, if MCUboot is present).
     * Secure image will use sram0 for system memory.
     *
     * Non-Secure image will be placed in slot0_ns, and use
     * sram0_ns for system memory.
     *
     * Note that the Secure image only requires knowledge of
     * the beginning of the Non-Secure image (not its size).
     */
    
    &slot0_partition {
    	reg = <0x00010000 0x40000>;
    };
    
    &slot0_ns_partition {
    	reg = <0x00050000 0x30000>;
    };
    
    &slot1_partition {
    	reg = <0x00080000 0x40000>;
    };
    
    &slot1_ns_partition {
    	reg = <0x000c0000 0x30000>;
    };
    
    /* Default SRAM planning when building for nRF5340 with
     * ARM TrustZone-M support
     * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
     * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
     * - Upper 64 kB SRAM allocated as Shared memory (sram0_shared)
     *   (see nrf5340_shared_sram_planning_conf.dts)
     */
    &sram0_image {
    	reg = <0x20000000 DT_SIZE_K(448)>;
    };
    
    &sram0_s {
    	reg = <0x20000000 0x40000>;
    };
    
    &sram0_ns {
    	reg = <0x20040000 0x30000>;
    };
    

    1732.tricca_tritant_v1.zip

  • Hi James

    Now that Sigurd is on leave I will help you out with the case. 

    Would you be able to zip your build folder and share it with me, in the case where the pins are not accessible? 

    In particular it would be interesting to take a look at the zephyr.dts file, which contains the final devicetree configuration after the various dtsi, dts and overlays are merged. 

    Best regards
    Torbjørn

  • I was on vacation, so thanks for your patience. Find attached the zipped build folder for "blinkysupreme", which is the blinky program I wrote and you can find above.

    proj.conf

    ----------

    CONFIG_GPIO=y
    # CONFIG_KSCAN is not set
    # CONFIG_INPUT is not set
    # CONFIG_WIFI is not set
    # CONFIG_SPI is not set
    CONFIG_GPIO_INIT_PRIORITY=40
    # CONFIG_UHC_DRIVER is not set
    # CONFIG_REGULATOR is not set
    # CONFIG_SENSOR is not set
    # CONFIG_WATCHDOG is not set
    # CONFIG_MODEM is not set
    # CONFIG_DISPLAY is not set
    CONFIG_I2C=y
    CONFIG_BOARD="tricca_tritant_v1"
    CONFIG_SOC="nRF5340_CPUAPP_QKAA"
    CONFIG_SOC_SERIES="nrf53"
    CONFIG_NUM_IRQS=69
    CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768
    CONFIG_CLOCK_CONTROL_INIT_PRIORITY=30
    CONFIG_FLASH_SIZE=1024
    CONFIG_FLASH_BASE_ADDRESS=0x0
    CONFIG_ICACHE_LINE_SIZE=32
    CONFIG_DCACHE_LINE_SIZE=32
    CONFIG_CLOCK_CONTROL=y
    CONFIG_PINCTRL=y
    CONFIG_HEAP_MEM_POOL_SIZE=0
    CONFIG_ROM_START_OFFSET=0
    # CONFIG_RESET is not set
    CONFIG_SOC_HAS_TIMING_FUNCTIONS=y
    CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT=y
    CONFIG_PM=y
    # CONFIG_PM_DEVICE is not set
    CONFIG_NRF_RTC_TIMER=y
    CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768
    CONFIG_BUILD_OUTPUT_HEX=y
    # CONFIG_FPU is not set
    # CONFIG_CODE_DATA_RELOCATION is not set
    # CONFIG_MBEDTLS is not set
    # CONFIG_MEMC is not set
    # CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS is not set
    # CONFIG_TINYCRYPT is not set
    # CONFIG_SERIAL is not set
    CONFIG_MAIN_STACK_SIZE=1024
    # CONFIG_SRAM_VECTOR_TABLE is not set
    CONFIG_MP_MAX_NUM_CPUS=1
    CONFIG_PLATFORM_SPECIFIC_INIT=y
    CONFIG_HAS_DTS=y
    
    #
    # Devicetree Info
    #
    CONFIG_DT_HAS_ARM_ARMV8M_ITM_ENABLED=y
    CONFIG_DT_HAS_ARM_ARMV8M_MPU_ENABLED=y
    CONFIG_DT_HAS_ARM_CORTEX_M33F_ENABLED=y
    CONFIG_DT_HAS_ARM_CRYPTOCELL_312_ENABLED=y
    CONFIG_DT_HAS_ARM_V8M_NVIC_ENABLED=y
    CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED=y
    CONFIG_DT_HAS_GPIO_KEYS_ENABLED=y
    CONFIG_DT_HAS_MMIO_SRAM_ENABLED=y
    CONFIG_DT_HAS_NORDIC_MBOX_NRF_IPC_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_CC312_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_CLOCK_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_CTRLAPPERI_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_DCNF_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_DPPIC_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_EGU_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_FICR_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_GPIO_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_GPREGRET_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_IPC_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_KMU_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_MUTEX_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_NFCT_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_OSCILLATORS_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_PINCTRL_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_POWER_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_REGULATORS_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_RESET_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_SPU_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_TWIM_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_UICR_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_USBREG_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_VMC_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF_WDT_ENABLED=y
    CONFIG_DT_HAS_NORDIC_NRF53_FLASH_CONTROLLER_ENABLED=y
    CONFIG_DT_HAS_ROHM_BH1749_ENABLED=y
    CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED=y
    CONFIG_DT_HAS_TI_TCA9548A_ENABLED=y
    CONFIG_DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED=y
    CONFIG_DT_HAS_ZEPHYR_IPC_OPENAMP_STATIC_VRINGS_ENABLED=y
    # end of Devicetree Info
    
    #
    # Modules
    #
    
    #
    # Available modules.
    #
    
    #
    # nrf (/home/james/ncs/v2.4.0/nrf)
    #
    CONFIG_NUM_METAIRQ_PRIORITIES=0
    CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=1024
    # CONFIG_INIT_STACKS is not set
    
    #
    # Nordic nRF Connect
    #
    CONFIG_WARN_EXPERIMENTAL=y
    CONFIG_PRIVILEGED_STACK_SIZE=1024
    CONFIG_BT_BUF_CMD_TX_COUNT=10
    # CONFIG_ENTROPY_GENERATOR is not set
    CONFIG_INIT_ARCH_HW_AT_BOOT=y
    CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
    # CONFIG_GETOPT is not set
    # CONFIG_NCS_SAMPLES_DEFAULTS is not set
    
    #
    # Image build variants
    #
    # CONFIG_NCS_MCUBOOT_IN_BUILD is not set
    # end of Image build variants
    
    #
    # Bootloader
    #
    # CONFIG_BUILD_S1_VARIANT is not set
    # CONFIG_SECURE_BOOT is not set
    CONFIG_PM_PARTITION_SIZE_PROVISION=0x280
    # CONFIG_B0_MIN_PARTITION_SIZE is not set
    CONFIG_PM_PARTITION_SIZE_B0_IMAGE=0x8000
    # CONFIG_SECURE_BOOT_CRYPTO is not set
    
    #
    # Secure Boot firmware validation
    #
    CONFIG_SB_VALIDATION_INFO_MAGIC=0x86518483
    CONFIG_SB_VALIDATION_POINTER_MAGIC=0x6919b47e
    CONFIG_SB_VALIDATION_INFO_CRYPTO_ID=1
    CONFIG_SB_VALIDATION_INFO_VERSION=2
    CONFIG_SB_VALIDATION_METADATA_OFFSET=0
    CONFIG_SB_VALIDATE_FW_SIGNATURE=y
    # end of Secure Boot firmware validation
    # end of Bootloader
    
    #
    # Bluetooth Low Energy
    #
    
    #
    # BLE over nRF RPC
    #
    # end of BLE over nRF RPC
    # end of Bluetooth Low Energy
    
    #
    # DFU
    #
    # CONFIG_DFU_MULTI_IMAGE is not set
    # CONFIG_DFU_TARGET is not set
    # end of DFU
    
    # CONFIG_ESB is not set
    
    #
    # Peripheral CPU DFU (PCD)
    #
    # CONFIG_PCD is not set
    # CONFIG_PCD_APP is not set
    # CONFIG_PCD_NET is not set
    # end of Peripheral CPU DFU (PCD)
    
    #
    # Networking
    #
    
    #
    # Application protocols
    #
    
    #
    # nRF Cloud
    #
    
    #
    # Client ID (nRF Cloud Device ID)
    #
    CONFIG_NRF_CLOUD_CLIENT_ID_SRC_COMPILE_TIME=y
    CONFIG_NRF_CLOUD_CLIENT_ID="my-client-id"
    # end of Client ID (nRF Cloud Device ID)
    
    # CONFIG_NRF_CLOUD_MQTT is not set
    # CONFIG_NRF_CLOUD_FOTA is not set
    # CONFIG_NRF_CLOUD_FOTA_FULL_MODEM_UPDATE is not set
    # CONFIG_NRF_CLOUD_REST is not set
    # CONFIG_NRF_CLOUD_ALERT is not set
    CONFIG_NRF_CLOUD_LOG_OUTPUT_LEVEL=1
    CONFIG_NRF_CLOUD_LOG_BUF_SIZE=256
    # CONFIG_NRF_CLOUD_GATEWAY is not set
    # end of nRF Cloud
    
    # CONFIG_REST_CLIENT is not set
    # CONFIG_DOWNLOAD_CLIENT is not set
    # CONFIG_AWS_IOT is not set
    # CONFIG_AWS_JOBS is not set
    # CONFIG_AZURE_IOT_HUB is not set
    
    #
    # Self-Registration (Zi ZHu Ce)
    #
    # end of Self-Registration (Zi ZHu Ce)
    
    # CONFIG_ICAL_PARSER is not set
    # CONFIG_FTP_CLIENT is not set
    # CONFIG_LWM2M_CLIENT_UTILS is not set
    # CONFIG_WIFI_CREDENTIALS is not set
    # CONFIG_WIFI_CREDENTIALS_STATIC is not set
    # CONFIG_MQTT_HELPER is not set
    # end of Application protocols
    # end of Networking
    
    #
    # NFC
    #
    # CONFIG_NFC_NDEF is not set
    # CONFIG_NFC_NDEF_PARSER is not set
    # CONFIG_NFC_NDEF_PAYLOAD_TYPE_COMMON is not set
    # CONFIG_NFC_T2T_PARSER is not set
    # CONFIG_NFC_T4T_NDEF_FILE is not set
    # CONFIG_NFC_T4T_ISODEP is not set
    # CONFIG_NFC_T4T_APDU is not set
    # CONFIG_NFC_T4T_CC_FILE is not set
    # CONFIG_NFC_T4T_HL_PROCEDURE is not set
    # CONFIG_NFC_PLATFORM is not set
    # CONFIG_NFC_TNEP_TAG is not set
    # CONFIG_NFC_TNEP_POLLER is not set
    # CONFIG_NFC_TNEP_CH is not set
    # end of NFC
    
    # CONFIG_APP_EVENT_MANAGER is not set
    # CONFIG_NRF_PROFILER is not set
    # CONFIG_FW_INFO is not set
    
    #
    # Debug
    #
    # CONFIG_CPU_LOAD is not set
    # CONFIG_PPI_TRACE is not set
    # end of Debug
    
    # CONFIG_MPSL_FEM_ONLY is not set
    # CONFIG_MPSL_FEM_DEVICE_CONFIG_254 is not set
    CONFIG_MPSL_THREAD_COOP_PRIO=8
    CONFIG_MPSL_WORK_STACK_SIZE=1024
    CONFIG_MPSL_TIMESLOT_SESSION_COUNT=0
    # CONFIG_MPSL_ASSERT_HANDLER is not set
    
    #
    # Partition Manager
    #
    # CONFIG_PARTITION_MANAGER_ENABLED is not set
    CONFIG_SRAM_SIZE=512
    CONFIG_SRAM_BASE_ADDRESS=0x20000000
    
    #
    # Zephyr subsystem configurations
    #
    # end of Zephyr subsystem configurations
    
    #
    # NCS subsystem configurations
    #
    # CONFIG_PM_SINGLE_IMAGE is not set
    CONFIG_PM_EXTERNAL_FLASH_BASE=0
    # CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK is not set
    CONFIG_PM_SRAM_BASE=0x20000000
    CONFIG_PM_SRAM_SIZE=0x80000
    # end of Partition Manager
    
    #
    # nRF RPC (Remote Procedure Call) library
    #
    # end of nRF RPC (Remote Procedure Call) library
    
    # CONFIG_ZIGBEE is not set
    
    #
    # Full Modem Firmware Update Management(FMFU)
    #
    # end of Full Modem Firmware Update Management(FMFU)
    
    # CONFIG_CAF is not set
    
    #
    # Nordic IEEE 802.15.4
    #
    # end of Nordic IEEE 802.15.4
    
    # CONFIG_DM_MODULE is not set
    
    #
    # TF-M SPM component configs
    #
    CONFIG_TFM_CONN_HANDLE_MAX_NUM=8
    # end of TF-M SPM component configs
    
    #
    # Libraries
    #
    
    #
    # Binary libraries
    #
    # CONFIG_BT_LL_ACS_NRF53 is not set
    # end of Binary libraries
    
    # CONFIG_ADP536X is not set
    # CONFIG_AT_MONITOR is not set
    # CONFIG_LTE_LINK_CONTROL is not set
    CONFIG_NRF_SPU_FLASH_REGION_SIZE=0x4000
    CONFIG_FPROTECT_BLOCK_SIZE=0x4000
    # CONFIG_FPROTECT is not set
    # CONFIG_AT_CMD_CUSTOM is not set
    # CONFIG_DK_LIBRARY is not set
    # CONFIG_MODEM_INFO is not set
    # CONFIG_RESET_ON_FATAL_ERROR is not set
    # CONFIG_SMS is not set
    # CONFIG_SUPL_CLIENT_LIB is not set
    # CONFIG_DATE_TIME is not set
    # CONFIG_HW_ID_LIBRARY is not set
    # CONFIG_RAM_POWER_DOWN_LIBRARY is not set
    # CONFIG_WAVE_GEN_LIB is not set
    CONFIG_HW_UNIQUE_KEY_PARTITION_SIZE=0
    # CONFIG_MODEM_JWT is not set
    # CONFIG_QOS is not set
    # CONFIG_SFLOAT is not set
    # CONFIG_CONTIN_ARRAY is not set
    # CONFIG_PCM_MIX is not set
    # CONFIG_TONE is not set
    # CONFIG_PSCM is not set
    # CONFIG_DATA_FIFO is not set
    # CONFIG_FEM_AL_LIB is not set
    # end of Libraries
    
    #
    # Device Drivers
    #
    # CONFIG_BT_DRIVER_QUIRK_NO_AUTO_DLE is not set
    CONFIG_HW_CC3XX=y
    # CONFIG_ETH_RTT is not set
    # CONFIG_NRF_SW_LPUART is not set
    CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS=1
    # end of Device Drivers
    
    #
    # External libraries
    #
    # end of External libraries
    
    #
    # Test
    #
    CONFIG_ZTEST_MULTICORE_DEFAULT_SETTINGS=y
    # CONFIG_UNITY is not set
    
    #
    # Mocks
    #
    # CONFIG_MOCK_NRF_MODEM_AT is not set
    # end of Mocks
    # end of Test
    # end of Nordic nRF Connect
    
    CONFIG_ZEPHYR_NRF_MODULE=y
    # end of nrf (/home/james/ncs/v2.4.0/nrf)
    
    #
    # hostap (/home/james/ncs/v2.4.0/modules/lib/hostap)
    #
    CONFIG_POSIX_MAX_FDS=4
    CONFIG_ZEPHYR_HOSTAP_MODULE=y
    # end of hostap (/home/james/ncs/v2.4.0/modules/lib/hostap)
    
    #
    # mcuboot (/home/james/ncs/v2.4.0/bootloader/mcuboot)
    #
    
    #
    # MCUboot
    #
    CONFIG_BOOT_SIGNATURE_KEY_FILE=""
    CONFIG_DT_FLASH_WRITE_BLOCK_SIZE=4
    # CONFIG_MCUBOOT_USE_ALL_AVAILABLE_RAM is not set
    # end of MCUboot
    
    CONFIG_ZEPHYR_MCUBOOT_MODULE=y
    # end of mcuboot (/home/james/ncs/v2.4.0/bootloader/mcuboot)
    
    #
    # mbedtls (/home/james/ncs/v2.4.0/modules/crypto/mbedtls)
    #
    CONFIG_ZEPHYR_MBEDTLS_MODULE=y
    CONFIG_MBEDTLS_BUILTIN=y
    # CONFIG_MBEDTLS_LIBRARY is not set
    # end of mbedtls (/home/james/ncs/v2.4.0/modules/crypto/mbedtls)
    
    #
    # trusted-firmware-m (/home/james/ncs/v2.4.0/modules/tee/tf-m/trusted-firmware-m)
    #
    # CONFIG_BOOTLOADER_MCUBOOT is not set
    CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE=y
    # end of trusted-firmware-m (/home/james/ncs/v2.4.0/modules/tee/tf-m/trusted-firmware-m)
    
    #
    # cjson (/home/james/ncs/v2.4.0/modules/lib/cjson)
    #
    CONFIG_ZEPHYR_CJSON_MODULE=y
    # end of cjson (/home/james/ncs/v2.4.0/modules/lib/cjson)
    
    #
    # azure-sdk-for-c (/home/james/ncs/v2.4.0/modules/lib/azure-sdk-for-c)
    #
    # CONFIG_AZURE_SDK is not set
    CONFIG_ZEPHYR_AZURE_SDK_FOR_C_MODULE=y
    # end of azure-sdk-for-c (/home/james/ncs/v2.4.0/modules/lib/azure-sdk-for-c)
    
    #
    # cirrus-logic (/home/james/ncs/v2.4.0/modules/hal/cirrus-logic)
    #
    # CONFIG_HW_CODEC_CIRRUS_LOGIC is not set
    CONFIG_ZEPHYR_CIRRUS_LOGIC_MODULE=y
    # end of cirrus-logic (/home/james/ncs/v2.4.0/modules/hal/cirrus-logic)
    
    #
    # openthread (/home/james/ncs/v2.4.0/modules/lib/openthread)
    #
    # CONFIG_OPENTHREAD is not set
    CONFIG_ZEPHYR_OPENTHREAD_MODULE=y
    # end of openthread (/home/james/ncs/v2.4.0/modules/lib/openthread)
    
    #
    # memfault-firmware-sdk (/home/james/ncs/v2.4.0/modules/lib/memfault-firmware-sdk)
    #
    # CONFIG_MEMFAULT is not set
    CONFIG_ZEPHYR_MEMFAULT_FIRMWARE_SDK_MODULE=y
    # end of memfault-firmware-sdk (/home/james/ncs/v2.4.0/modules/lib/memfault-firmware-sdk)
    
    #
    # canopennode (/home/james/ncs/v2.4.0/modules/lib/canopennode)
    #
    CONFIG_ZEPHYR_CANOPENNODE_MODULE=y
    # end of canopennode (/home/james/ncs/v2.4.0/modules/lib/canopennode)
    
    #
    # chre (/home/james/ncs/v2.4.0/modules/lib/chre)
    #
    CONFIG_ZEPHYR_CHRE_MODULE=y
    # CONFIG_CHRE is not set
    # end of chre (/home/james/ncs/v2.4.0/modules/lib/chre)
    
    #
    # fatfs (/home/james/ncs/v2.4.0/modules/fs/fatfs)
    #
    CONFIG_ZEPHYR_FATFS_MODULE=y
    # end of fatfs (/home/james/ncs/v2.4.0/modules/fs/fatfs)
    
    #
    # hal_nordic (/home/james/ncs/v2.4.0/modules/hal/nordic)
    #
    CONFIG_ZEPHYR_HAL_NORDIC_MODULE=y
    CONFIG_HAS_NORDIC_DRIVERS=y
    
    #
    # Nordic drivers
    #
    # CONFIG_NRF_802154_SOURCE_HAL_NORDIC is not set
    # CONFIG_NRF_802154_SER_HOST is not set
    # end of Nordic drivers
    
    CONFIG_HAS_NRFX=y
    
    #
    # nrfx drivers
    #
    CONFIG_NRFX_CLOCK=y
    # CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED is not set
    # CONFIG_NRFX_COMP is not set
    # CONFIG_NRFX_DPPI is not set
    # CONFIG_NRFX_EGU0 is not set
    # CONFIG_NRFX_EGU1 is not set
    # CONFIG_NRFX_EGU2 is not set
    # CONFIG_NRFX_EGU3 is not set
    # CONFIG_NRFX_EGU4 is not set
    # CONFIG_NRFX_EGU5 is not set
    CONFIG_NRFX_GPIOTE=y
    # CONFIG_NRFX_I2S is not set
    # CONFIG_NRFX_IPC is not set
    # CONFIG_NRFX_NFCT is not set
    # CONFIG_NRFX_NVMC is not set
    # CONFIG_NRFX_PDM is not set
    # CONFIG_NRFX_POWER is not set
    # CONFIG_NRFX_PWM0 is not set
    # CONFIG_NRFX_PWM1 is not set
    # CONFIG_NRFX_PWM2 is not set
    # CONFIG_NRFX_PWM3 is not set
    # CONFIG_NRFX_QDEC is not set
    # CONFIG_NRFX_QSPI is not set
    # CONFIG_NRFX_RTC0 is not set
    # CONFIG_NRFX_RTC1 is not set
    # CONFIG_NRFX_SAADC is not set
    # CONFIG_NRFX_SPIM0 is not set
    # CONFIG_NRFX_SPIM1 is not set
    # CONFIG_NRFX_SPIM2 is not set
    # CONFIG_NRFX_SPIM3 is not set
    # CONFIG_NRFX_SPIM4 is not set
    # CONFIG_NRFX_SYSTICK is not set
    # CONFIG_NRFX_TIMER0 is not set
    # CONFIG_NRFX_TIMER1 is not set
    # CONFIG_NRFX_TIMER2 is not set
    CONFIG_NRFX_TWIM=y
    # CONFIG_NRFX_TWIM0 is not set
    CONFIG_NRFX_TWIM1=y
    # CONFIG_NRFX_TWIM2 is not set
    # CONFIG_NRFX_TWIM3 is not set
    # CONFIG_NRFX_UARTE0 is not set
    # CONFIG_NRFX_UARTE1 is not set
    # CONFIG_NRFX_UARTE2 is not set
    # CONFIG_NRFX_UARTE3 is not set
    # CONFIG_NRFX_USBD is not set
    # CONFIG_NRFX_USBREG is not set
    # CONFIG_NRFX_WDT0 is not set
    # CONFIG_NRFX_WDT1 is not set
    
    #
    # Peripheral Resource Sharing module
    #
    # CONFIG_NRFX_PRS_BOX_0 is not set
    # CONFIG_NRFX_PRS_BOX_1 is not set
    # CONFIG_NRFX_PRS_BOX_2 is not set
    # CONFIG_NRFX_PRS_BOX_3 is not set
    # CONFIG_NRFX_PRS_BOX_4 is not set
    # end of Peripheral Resource Sharing module
    # end of nrfx drivers
    # end of hal_nordic (/home/james/ncs/v2.4.0/modules/hal/nordic)
    
    #
    # liblc3 (/home/james/ncs/v2.4.0/modules/lib/liblc3)
    #
    CONFIG_ZEPHYR_LIBLC3_MODULE=y
    # end of liblc3 (/home/james/ncs/v2.4.0/modules/lib/liblc3)
    
    #
    # littlefs (/home/james/ncs/v2.4.0/modules/fs/littlefs)
    #
    CONFIG_ZEPHYR_LITTLEFS_MODULE=y
    # end of littlefs (/home/james/ncs/v2.4.0/modules/fs/littlefs)
    
    #
    # loramac-node (/home/james/ncs/v2.4.0/modules/lib/loramac-node)
    #
    CONFIG_ZEPHYR_LORAMAC_NODE_MODULE=y
    # CONFIG_HAS_SEMTECH_RADIO_DRIVERS is not set
    # end of loramac-node (/home/james/ncs/v2.4.0/modules/lib/loramac-node)
    
    #
    # lvgl (/home/james/ncs/v2.4.0/modules/lib/gui/lvgl)
    #
    CONFIG_ZEPHYR_LVGL_MODULE=y
    # end of lvgl (/home/james/ncs/v2.4.0/modules/lib/gui/lvgl)
    
    #
    # lz4 (/home/james/ncs/v2.4.0/modules/lib/lz4)
    #
    CONFIG_ZEPHYR_LZ4_MODULE=y
    # CONFIG_LZ4 is not set
    # end of lz4 (/home/james/ncs/v2.4.0/modules/lib/lz4)
    
    #
    # nanopb (/home/james/ncs/v2.4.0/modules/lib/nanopb)
    #
    CONFIG_ZEPHYR_NANOPB_MODULE=y
    # CONFIG_NANOPB is not set
    # end of nanopb (/home/james/ncs/v2.4.0/modules/lib/nanopb)
    
    #
    # picolibc (/home/james/ncs/v2.4.0/modules/lib/picolibc)
    #
    # CONFIG_PICOLIBC_MODULE is not set
    CONFIG_ZEPHYR_PICOLIBC_MODULE=y
    # end of picolibc (/home/james/ncs/v2.4.0/modules/lib/picolibc)
    
    #
    # segger (/home/james/ncs/v2.4.0/modules/debug/segger)
    #
    CONFIG_ZEPHYR_SEGGER_MODULE=y
    CONFIG_HAS_SEGGER_RTT=y
    # CONFIG_USE_SEGGER_RTT is not set
    # end of segger (/home/james/ncs/v2.4.0/modules/debug/segger)
    
    #
    # TraceRecorder (/home/james/ncs/v2.4.0/modules/debug/TraceRecorder)
    #
    CONFIG_ZEPHYR_TRACERECORDER_MODULE=y
    # end of TraceRecorder (/home/james/ncs/v2.4.0/modules/debug/TraceRecorder)
    
    #
    # uoscore-uedhoc (/home/james/ncs/v2.4.0/modules/lib/uoscore-uedhoc)
    #
    CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE=y
    # end of uoscore-uedhoc (/home/james/ncs/v2.4.0/modules/lib/uoscore-uedhoc)
    
    #
    # zcbor (/home/james/ncs/v2.4.0/modules/lib/zcbor)
    #
    CONFIG_ZEPHYR_ZCBOR_MODULE=y
    # CONFIG_ZCBOR is not set
    # end of zcbor (/home/james/ncs/v2.4.0/modules/lib/zcbor)
    
    #
    # zscilib (/home/james/ncs/v2.4.0/modules/lib/zscilib)
    #
    # CONFIG_ZSL is not set
    CONFIG_ZEPHYR_ZSCILIB_MODULE=y
    # end of zscilib (/home/james/ncs/v2.4.0/modules/lib/zscilib)
    
    #
    # nrfxlib (/home/james/ncs/v2.4.0/nrfxlib)
    #
    
    #
    # Nordic nrfxlib
    #
    CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE=0x4e8
    # CONFIG_NFC_T2T_NRFXLIB is not set
    # CONFIG_NFC_T4T_NRFXLIB is not set
    
    #
    # Crypto libraries for nRF5x SOCs.
    #
    CONFIG_NRFXLIB_CRYPTO=y
    CONFIG_CRYPTOCELL_CC312_USABLE=y
    CONFIG_CRYPTOCELL_USABLE=y
    # CONFIG_NRF_OBERON is not set
    # CONFIG_NRF_CC310_BL is not set
    CONFIG_NRF_CC3XX_PLATFORM=y
    CONFIG_CC3XX_MUTEX_LOCK=y
    # CONFIG_CC3XX_ATOMIC_LOCK is not set
    # CONFIG_CC3XX_HW_MUTEX_LOCK is not set
    # end of Crypto libraries for nRF5x SOCs.
    
    #
    # nrf_security module
    #
    # CONFIG_NORDIC_SECURITY_BACKEND is not set
    # CONFIG_NRF_SECURITY is not set
    # end of nrf_security module
    
    # CONFIG_NRF_RPC is not set
    CONFIG_NRF_802154_SOURCE_NRFXLIB=y
    # CONFIG_GZLL is not set
    # CONFIG_NRF_DM is not set
    # CONFIG_LC3_PLC_DISABLED is not set
    CONFIG_LC3_ENC_CHAN_MAX=1
    CONFIG_LC3_DEC_CHAN_MAX=1
    
    #
    # Encoder sample rates
    #
    CONFIG_LC3_ENC_SAMPLE_RATE_8KHZ_SUPPORT=y
    CONFIG_LC3_ENC_SAMPLE_RATE_16KHZ_SUPPORT=y
    CONFIG_LC3_ENC_SAMPLE_RATE_24KHZ_SUPPORT=y
    CONFIG_LC3_ENC_SAMPLE_RATE_32KHZ_SUPPORT=y
    CONFIG_LC3_ENC_SAMPLE_RATE_441KHZ_SUPPORT=y
    CONFIG_LC3_ENC_SAMPLE_RATE_48KHZ_SUPPORT=y
    # end of Encoder sample rates
    
    #
    # Decoder sample rates
    #
    CONFIG_LC3_DEC_SAMPLE_RATE_8KHZ_SUPPORT=y
    CONFIG_LC3_DEC_SAMPLE_RATE_16KHZ_SUPPORT=y
    CONFIG_LC3_DEC_SAMPLE_RATE_24KHZ_SUPPORT=y
    CONFIG_LC3_DEC_SAMPLE_RATE_32KHZ_SUPPORT=y
    CONFIG_LC3_DEC_SAMPLE_RATE_441KHZ_SUPPORT=y
    CONFIG_LC3_DEC_SAMPLE_RATE_48KHZ_SUPPORT=y
    # end of Decoder sample rates
    
    # CONFIG_NRF_FUEL_GAUGE is not set
    # end of Nordic nrfxlib
    
    CONFIG_ZEPHYR_NRFXLIB_MODULE=y
    # end of nrfxlib (/home/james/ncs/v2.4.0/nrfxlib)
    
    #
    # connectedhomeip (/home/james/ncs/v2.4.0/modules/lib/matter)
    #
    # CONFIG_CHIP is not set
    # CONFIG_CHIP_LOG_SIZE_OPTIMIZATION is not set
    CONFIG_ZEPHYR_CONNECTEDHOMEIP_MODULE=y
    # end of connectedhomeip (/home/james/ncs/v2.4.0/modules/lib/matter)
    
    #
    # Optional modules. Make sure they're installed, via the project manifest.
    #
    CONFIG_HAS_CMSIS_CORE=y
    CONFIG_HAS_CMSIS_CORE_M=y
    # CONFIG_CMSIS_DSP is not set
    # CONFIG_CMSIS_NN is not set
    # CONFIG_LIBMETAL is not set
    # CONFIG_LVGL is not set
    # CONFIG_HAS_MEC_HAL is not set
    # CONFIG_HAS_MPFS_HAL is not set
    # CONFIG_OPENAMP is not set
    # CONFIG_SOF is not set
    # CONFIG_MIPI_SYST_LIB is not set
    # CONFIG_HAS_TELINK_DRIVERS is not set
    # CONFIG_MCUBOOT_BOOTUTIL_LIB is not set
    
    #
    # Unavailable modules, please install those via the project manifest.
    #
    
    #
    # hal_gigadevice module not available.
    #
    
    #
    # Trusted-firmware-a module not available.
    #
    
    #
    # THRIFT module not available.
    #
    # end of Modules
    
    CONFIG_BOARD_REVISION=""
    # CONFIG_NET_DRIVERS is not set
    CONFIG_BOARD_TRICCA_TRITANT_V1=y
    
    #
    # Board Options
    #
    # end of Board Options
    
    # CONFIG_SOC_SERIES_BEETLE is not set
    # CONFIG_SOC_SERIES_ARM_DESIGNSTART is not set
    # CONFIG_SOC_SERIES_FVP_AEMV8R_AARCH32 is not set
    # CONFIG_SOC_SERIES_MPS2 is not set
    # CONFIG_SOC_SERIES_MPS3 is not set
    # CONFIG_SOC_SERIES_MUSCA_B1 is not set
    # CONFIG_SOC_SERIES_MUSCA_S1 is not set
    # CONFIG_SOC_SERIES_AST10X0 is not set
    # CONFIG_SOC_SERIES_SAM3X is not set
    # CONFIG_SOC_SERIES_SAM4E is not set
    # CONFIG_SOC_SERIES_SAM4L is not set
    # CONFIG_SOC_SERIES_SAM4S is not set
    # CONFIG_SOC_SERIES_SAME70 is not set
    # CONFIG_SOC_SERIES_SAMV71 is not set
    # CONFIG_SOC_SERIES_SAMC20 is not set
    # CONFIG_SOC_SERIES_SAMC21 is not set
    # CONFIG_SOC_SERIES_SAMD20 is not set
    # CONFIG_SOC_SERIES_SAMD21 is not set
    # CONFIG_SOC_SERIES_SAMD51 is not set
    # CONFIG_SOC_SERIES_SAME51 is not set
    # CONFIG_SOC_SERIES_SAME53 is not set
    # CONFIG_SOC_SERIES_SAME54 is not set
    # CONFIG_SOC_SERIES_SAML21 is not set
    # CONFIG_SOC_SERIES_SAMR21 is not set
    # CONFIG_SOC_SERIES_SAMR34 is not set
    # CONFIG_SOC_SERIES_SAMR35 is not set
    # CONFIG_SOC_SERIES_VALKYRIE is not set
    # CONFIG_SOC_SERIES_VIPER is not set
    # CONFIG_SOC_SERIES_PSOC62 is not set
    # CONFIG_SOC_SERIES_PSOC63 is not set
    # CONFIG_SOC_SERIES_GD32A50X is not set
    # CONFIG_SOC_SERIES_GD32E10X is not set
    # CONFIG_SOC_SERIES_GD32E50X is not set
    # CONFIG_SOC_SERIES_GD32F3X0 is not set
    # CONFIG_SOC_SERIES_GD32F403 is not set
    # CONFIG_SOC_SERIES_GD32F4XX is not set
    # CONFIG_SOC_SERIES_GD32L23X is not set
    # CONFIG_SOC_SERIES_PSOC_60 is not set
    # CONFIG_SOC_SERIES_PSOC_61 is not set
    # CONFIG_SOC_SERIES_PSOC_62 is not set
    # CONFIG_SOC_SERIES_PSOC_63 is not set
    # CONFIG_SOC_SERIES_PSOC_64 is not set
    # CONFIG_SOC_SERIES_XMC_4XXX is not set
    # CONFIG_SOC_SERIES_CYCLONE5 is not set
    # CONFIG_SOC_SERIES_MEC1501X is not set
    # CONFIG_SOC_SERIES_MEC1701X is not set
    # CONFIG_SOC_SERIES_MEC172X is not set
    # CONFIG_SOC_SERIES_NRF51X is not set
    # CONFIG_SOC_SERIES_NRF52X is not set
    CONFIG_SOC_SERIES_NRF53X=y
    # CONFIG_SOC_SERIES_NRF91X is not set
    # CONFIG_SOC_SERIES_NPCX7 is not set
    # CONFIG_SOC_SERIES_NPCX9 is not set
    # CONFIG_SOC_SERIES_M48X is not set
    # CONFIG_SOC_SERIES_IMX_6X_M4 is not set
    # CONFIG_SOC_SERIES_IMX7_M4 is not set
    # CONFIG_SOC_SERIES_IMX8ML_M7 is not set
    # CONFIG_SOC_SERIES_IMX8MM_M4 is not set
    # CONFIG_SOC_SERIES_IMX8MQ_M4 is not set
    # CONFIG_SOC_SERIES_IMX_RT is not set
    # CONFIG_SOC_SERIES_IMX_RT5XX is not set
    # CONFIG_SOC_SERIES_IMX_RT6XX is not set
    # CONFIG_SOC_SERIES_KINETIS_K2X is not set
    # CONFIG_SOC_SERIES_KINETIS_K6X is not set
    # CONFIG_SOC_SERIES_KINETIS_K8X is not set
    # CONFIG_SOC_SERIES_KINETIS_KE1XF is not set
    # CONFIG_SOC_SERIES_KINETIS_KL2X is not set
    # CONFIG_SOC_SERIES_KINETIS_KV5X is not set
    # CONFIG_SOC_SERIES_KINETIS_KWX is not set
    # CONFIG_SOC_SERIES_LPC11U6X is not set
    # CONFIG_SOC_SERIES_LPC51U68 is not set
    # CONFIG_SOC_SERIES_LPC54XXX is not set
    # CONFIG_SOC_SERIES_LPC55XXX is not set
    # CONFIG_SOC_SERIES_S32ZE_R52 is not set
    # CONFIG_SOC_EOS_S3 is not set
    # CONFIG_SOC_SERIES_RCAR_GEN3 is not set
    # CONFIG_SOC_SERIES_DA1469X is not set
    # CONFIG_SOC_SERIES_RP2XXX is not set
    # CONFIG_SOC_SERIES_EFM32GG11B is not set
    # CONFIG_SOC_SERIES_EFM32HG is not set
    # CONFIG_SOC_SERIES_EFM32JG12B is not set
    # CONFIG_SOC_SERIES_EFM32PG12B is not set
    # CONFIG_SOC_SERIES_EFM32PG1B is not set
    # CONFIG_SOC_SERIES_EFM32WG is not set
    # CONFIG_SOC_SERIES_EFR32BG13P is not set
    # CONFIG_SOC_SERIES_EFR32BG22 is not set
    # CONFIG_SOC_SERIES_EFR32FG13P is not set
    # CONFIG_SOC_SERIES_EFR32FG1P is not set
    # CONFIG_SOC_SERIES_EFR32MG12P is not set
    # CONFIG_SOC_SERIES_EFR32MG21 is not set
    # CONFIG_SOC_SERIES_EFR32MG24 is not set
    # CONFIG_SOC_SERIES_STM32C0X is not set
    # CONFIG_SOC_SERIES_STM32F0X is not set
    # CONFIG_SOC_SERIES_STM32F1X is not set
    # CONFIG_SOC_SERIES_STM32F2X is not set
    # CONFIG_SOC_SERIES_STM32F3X is not set
    # CONFIG_SOC_SERIES_STM32F4X is not set
    # CONFIG_SOC_SERIES_STM32F7X is not set
    # CONFIG_SOC_SERIES_STM32G0X is not set
    # CONFIG_SOC_SERIES_STM32G4X is not set
    # CONFIG_SOC_SERIES_STM32H5X is not set
    # CONFIG_SOC_SERIES_STM32H7X is not set
    # CONFIG_SOC_SERIES_STM32L0X is not set
    # CONFIG_SOC_SERIES_STM32L1X is not set
    # CONFIG_SOC_SERIES_STM32L4X is not set
    # CONFIG_SOC_SERIES_STM32L5X is not set
    # CONFIG_SOC_SERIES_STM32MP1X is not set
    # CONFIG_SOC_SERIES_STM32U5X is not set
    # CONFIG_SOC_SERIES_STM32WBX is not set
    # CONFIG_SOC_SERIES_STM32WLX is not set
    # CONFIG_SOC_TI_LM3S6965 is not set
    # CONFIG_SOC_SERIES_CC13X2_CC26X2 is not set
    # CONFIG_SOC_SERIES_CC13X2X7_CC26X2X7 is not set
    # CONFIG_SOC_SERIES_CC32XX is not set
    # CONFIG_SOC_SERIES_MSP432P4XX is not set
    # CONFIG_SOC_SERIES_XILINX_XC7ZXXX is not set
    # CONFIG_SOC_SERIES_XILINX_XC7ZXXXS is not set
    # CONFIG_SOC_XILINX_ZYNQMP_RPU is not set
    
    #
    # Hardware Configuration
    #
    CONFIG_CPU_HAS_ARM_MPU=y
    CONFIG_CPU_HAS_NRF_IDAU=y
    CONFIG_NRF_SPU_RAM_REGION_SIZE=0x2000
    CONFIG_HAS_SWO=y
    CONFIG_SOC_FAMILY="nordic_nrf"
    CONFIG_SOC_FAMILY_NRF=y
    CONFIG_HAS_HW_NRF_CC312=y
    CONFIG_HAS_HW_NRF_CLOCK=y
    CONFIG_HAS_HW_NRF_CTRLAP=y
    CONFIG_HAS_HW_NRF_DCNF=y
    CONFIG_HAS_HW_NRF_DPPIC=y
    CONFIG_HAS_HW_NRF_EGU0=y
    CONFIG_HAS_HW_NRF_EGU1=y
    CONFIG_HAS_HW_NRF_EGU2=y
    CONFIG_HAS_HW_NRF_EGU3=y
    CONFIG_HAS_HW_NRF_EGU4=y
    CONFIG_HAS_HW_NRF_EGU5=y
    CONFIG_HAS_HW_NRF_GPIO0=y
    CONFIG_HAS_HW_NRF_GPIO1=y
    CONFIG_HAS_HW_NRF_IPC=y
    CONFIG_HAS_HW_NRF_KMU=y
    CONFIG_HAS_HW_NRF_MUTEX=y
    CONFIG_HAS_HW_NRF_NFCT=y
    CONFIG_HAS_HW_NRF_NVMC_PE=y
    CONFIG_HAS_HW_NRF_OSCILLATORS=y
    CONFIG_HAS_HW_NRF_POWER=y
    CONFIG_HAS_HW_NRF_REGULATORS=y
    CONFIG_HAS_HW_NRF_RESET=y
    CONFIG_HAS_HW_NRF_SPU=y
    CONFIG_HAS_HW_NRF_TWIM1=y
    CONFIG_HAS_HW_NRF_USBREG=y
    CONFIG_HAS_HW_NRF_VMC=y
    CONFIG_HAS_HW_NRF_WDT0=y
    CONFIG_SOC_NRF5340_CPUAPP=y
    CONFIG_SOC_NRF5340_CPUAPP_QKAA=y
    # CONFIG_SOC_NRF5340_CPUNET_QKAA is not set
    # CONFIG_SOC_NRF53_ANOMALY_160_WORKAROUND_NEEDED is not set
    CONFIG_SOC_ENABLE_LFXO=y
    # CONFIG_SOC_LFXO_CAP_EXTERNAL is not set
    # CONFIG_SOC_LFXO_CAP_INT_6PF is not set
    CONFIG_SOC_LFXO_CAP_INT_7PF=y
    # CONFIG_SOC_LFXO_CAP_INT_9PF is not set
    CONFIG_SOC_HFXO_CAP_DEFAULT=y
    # CONFIG_SOC_HFXO_CAP_EXTERNAL is not set
    # CONFIG_SOC_HFXO_CAP_INTERNAL is not set
    CONFIG_NRF_ENABLE_CACHE=y
    # CONFIG_NRF53_SYNC_RTC is not set
    CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT=0
    CONFIG_NRF_SOC_SECURE_SUPPORTED=y
    CONFIG_NFCT_PINS_AS_GPIOS=y
    CONFIG_NRF_APPROTECT_USE_UICR=y
    # CONFIG_NRF_APPROTECT_LOCK is not set
    # CONFIG_NRF_APPROTECT_USER_HANDLING is not set
    CONFIG_NRF_SECURE_APPROTECT_USE_UICR=y
    # CONFIG_NRF_SECURE_APPROTECT_LOCK is not set
    # CONFIG_NRF_SECURE_APPROTECT_USER_HANDLING is not set
    # CONFIG_NRF_TRACE_PORT is not set
    # CONFIG_BUILD_OUTPUT_INFO_HEADER is not set
    # end of Hardware Configuration
    
    CONFIG_SOC_COMPATIBLE_NRF=y
    
    #
    # ARM Options
    #
    CONFIG_ARCH="arm"
    CONFIG_CPU_CORTEX=y
    # CONFIG_CODE_DATA_RELOCATION_SRAM is not set
    CONFIG_CPU_CORTEX_M=y
    # CONFIG_ARM_ZIMAGE_HEADER is not set
    CONFIG_ISA_THUMB2=y
    CONFIG_ASSEMBLER_ISA_THUMB2=y
    CONFIG_COMPILER_ISA_THUMB2=y
    CONFIG_STACK_ALIGN_DOUBLE_WORD=y
    # CONFIG_RUNTIME_NMI is not set
    CONFIG_FAULT_DUMP=2
    CONFIG_BUILTIN_STACK_GUARD=y
    CONFIG_ARM_STACK_PROTECTION=y
    CONFIG_CPU_CORTEX_M33=y
    CONFIG_CPU_CORTEX_M_HAS_SYSTICK=y
    CONFIG_CPU_CORTEX_M_HAS_DWT=y
    CONFIG_CPU_CORTEX_M_HAS_BASEPRI=y
    CONFIG_CPU_CORTEX_M_HAS_VTOR=y
    CONFIG_CPU_CORTEX_M_HAS_SPLIM=y
    CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS=y
    CONFIG_CPU_CORTEX_M_HAS_CMSE=y
    CONFIG_ARMV7_M_ARMV8_M_MAINLINE=y
    CONFIG_ARMV8_M_MAINLINE=y
    CONFIG_ARMV8_M_SE=y
    CONFIG_ARMV7_M_ARMV8_M_FP=y
    CONFIG_ARMV8_M_DSP=y
    
    #
    # ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 options
    #
    CONFIG_GEN_ISR_TABLES=y
    # CONFIG_ZERO_LATENCY_IRQS is not set
    # CONFIG_SW_VECTOR_RELAY is not set
    # CONFIG_CORTEX_M_DWT is not set
    # CONFIG_CORTEX_M_DEBUG_MONITOR_HOOK is not set
    # CONFIG_TRAP_UNALIGNED_ACCESS is not set
    # end of ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 options
    
    CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
    # CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT is not set
    # CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU is not set
    CONFIG_ARM_TRUSTZONE_M=y
    CONFIG_GEN_IRQ_VECTOR_TABLE=y
    CONFIG_ARM_MPU=y
    CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE=32
    # CONFIG_MPU_STACK_GUARD is not set
    # CONFIG_MPU_ALLOW_FLASH_WRITE is not set
    # CONFIG_MPU_DISABLE_BACKGROUND_MAP is not set
    # CONFIG_CUSTOM_SECTION_ALIGN is not set
    CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE=32
    # end of ARM Options
    
    CONFIG_ARM=y
    CONFIG_ARCH_IS_SET=y
    
    #
    # General Architecture Options
    #
    # CONFIG_SEMIHOST is not set
    CONFIG_LITTLE_ENDIAN=y
    # CONFIG_TRUSTED_EXECUTION_SECURE is not set
    # CONFIG_TRUSTED_EXECUTION_NONSECURE is not set
    CONFIG_HW_STACK_PROTECTION=y
    # CONFIG_USERSPACE is not set
    CONFIG_KOBJECT_TEXT_AREA=256
    CONFIG_KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT=100
    CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES=16
    CONFIG_GEN_PRIV_STACKS=y
    # CONFIG_STACK_GROWS_UP is not set
    
    #
    # Interrupt Configuration
    #
    # CONFIG_DYNAMIC_INTERRUPTS is not set
    CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN=4
    CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS=y
    # CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE is not set
    CONFIG_GEN_SW_ISR_TABLE=y
    CONFIG_ARCH_SW_ISR_TABLE_ALIGN=4
    CONFIG_GEN_IRQ_START_VECTOR=0
    # CONFIG_EXTRA_EXCEPTION_INFO is not set
    # CONFIG_SIMPLIFIED_EXCEPTION_CODES is not set
    # end of Interrupt Configuration
    # end of General Architecture Options
    
    CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT=y
    CONFIG_ARCH_HAS_TIMING_FUNCTIONS=y
    CONFIG_ARCH_HAS_TRUSTED_EXECUTION=y
    CONFIG_ARCH_HAS_STACK_PROTECTION=y
    CONFIG_ARCH_HAS_USERSPACE=y
    CONFIG_ARCH_HAS_EXECUTABLE_PAGE_BIT=y
    CONFIG_ARCH_HAS_RAMFUNC_SUPPORT=y
    CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION=y
    CONFIG_ARCH_SUPPORTS_COREDUMP=y
    CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT=y
    CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO=y
    CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE=y
    CONFIG_ARCH_HAS_SUSPEND_TO_RAM=y
    CONFIG_ARCH_HAS_THREAD_ABORT=y
    CONFIG_ARCH_HAS_CODE_DATA_RELOCATION=y
    CONFIG_CPU_HAS_TEE=y
    CONFIG_CPU_HAS_FPU=y
    CONFIG_CPU_HAS_MPU=y
    CONFIG_MPU=y
    CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS=y
    CONFIG_MPU_GAP_FILLING=y
    CONFIG_SRAM_REGION_PERMISSIONS=y
    
    #
    # Floating Point Options
    #
    # end of Floating Point Options
    
    #
    # Cache Options
    #
    # end of Cache Options
    
    CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS=y
    
    #
    # General Kernel Options
    #
    CONFIG_MULTITHREADING=y
    CONFIG_NUM_COOP_PRIORITIES=16
    CONFIG_NUM_PREEMPT_PRIORITIES=15
    CONFIG_MAIN_THREAD_PRIORITY=0
    CONFIG_COOP_ENABLED=y
    CONFIG_PREEMPT_ENABLED=y
    CONFIG_PRIORITY_CEILING=-127
    # CONFIG_SCHED_DEADLINE is not set
    # CONFIG_SCHED_CPU_MASK is not set
    CONFIG_IDLE_STACK_SIZE=320
    CONFIG_ISR_STACK_SIZE=2048
    CONFIG_THREAD_STACK_INFO=y
    # CONFIG_THREAD_CUSTOM_DATA is not set
    CONFIG_ERRNO=y
    CONFIG_SCHED_DUMB=y
    # CONFIG_SCHED_SCALABLE is not set
    # CONFIG_SCHED_MULTIQ is not set
    # CONFIG_WAITQ_SCALABLE is not set
    CONFIG_WAITQ_DUMB=y
    
    #
    # Kernel Debugging and Metrics
    #
    CONFIG_BOOT_BANNER=y
    CONFIG_BOOT_DELAY=0
    CONFIG_THREAD_MONITOR=y
    CONFIG_THREAD_NAME=y
    CONFIG_THREAD_MAX_NAME_LEN=32
    # CONFIG_THREAD_RUNTIME_STATS is not set
    # end of Kernel Debugging and Metrics
    
    #
    # Work Queue Options
    #
    CONFIG_SYSTEM_WORKQUEUE_PRIORITY=-1
    # CONFIG_SYSTEM_WORKQUEUE_NO_YIELD is not set
    # end of Work Queue Options
    
    #
    # Atomic Operations
    #
    CONFIG_ATOMIC_OPERATIONS_BUILTIN=y
    # end of Atomic Operations
    
    #
    # Timer API Options
    #
    CONFIG_TIMESLICING=y
    CONFIG_TIMESLICE_SIZE=0
    CONFIG_TIMESLICE_PRIORITY=0
    # CONFIG_TIMESLICE_PER_THREAD is not set
    # CONFIG_POLL is not set
    # end of Timer API Options
    
    #
    # Other Kernel Object Options
    #
    # CONFIG_MEM_SLAB_TRACE_MAX_UTILIZATION is not set
    CONFIG_NUM_MBOX_ASYNC_MSGS=10
    # CONFIG_EVENTS is not set
    # CONFIG_PIPES is not set
    CONFIG_KERNEL_MEM_POOL=y
    # end of Other Kernel Object Options
    
    CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN=y
    CONFIG_SWAP_NONATOMIC=y
    CONFIG_SYS_CLOCK_EXISTS=y
    CONFIG_TIMEOUT_64BIT=y
    CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS=365
    CONFIG_XIP=y
    
    #
    # Initialization Priorities
    #
    CONFIG_KERNEL_INIT_PRIORITY_OBJECTS=30
    CONFIG_KERNEL_INIT_PRIORITY_DEFAULT=40
    CONFIG_KERNEL_INIT_PRIORITY_DEVICE=50
    CONFIG_APPLICATION_INIT_PRIORITY=90
    # end of Initialization Priorities
    
    #
    # Security Options
    #
    # end of Security Options
    
    #
    # SMP Options
    #
    CONFIG_MP_NUM_CPUS=1
    # end of SMP Options
    
    CONFIG_TICKLESS_KERNEL=y
    CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE=y
    # CONFIG_THREAD_LOCAL_STORAGE is not set
    # end of General Kernel Options
    
    #
    # Device Options
    #
    # end of Device Options
    
    #
    # Virtual Memory Support
    #
    # end of Virtual Memory Support
    
    #
    # Device Drivers
    #
    # CONFIG_ADC is not set
    # CONFIG_AUDIO is not set
    # CONFIG_BBRAM is not set
    # CONFIG_CACHE is not set
    # CONFIG_CAN is not set
    CONFIG_CLOCK_CONTROL_NRF=y
    CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH is not set
    CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION=y
    CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION=y
    CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_LF_ALWAYS_ON=y
    CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_PERIOD=4000
    CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP=1
    CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_TEMP_DIFF=2
    # CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_DEBUG is not set
    CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM is not set
    # CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM is not set
    CONFIG_CLOCK_CONTROL_NRF_ACCURACY=500
    # CONFIG_CONSOLE is not set
    # CONFIG_COREDUMP_DEVICE is not set
    # CONFIG_COUNTER is not set
    # CONFIG_CRYPTO is not set
    # CONFIG_DAC is not set
    # CONFIG_DAI is not set
    # CONFIG_DISK_DRIVERS is not set
    # CONFIG_DMA is not set
    # CONFIG_EDAC is not set
    # CONFIG_EEPROM is not set
    # CONFIG_ESPI is not set
    # CONFIG_FLASH is not set
    # CONFIG_FPGA is not set
    # CONFIG_FUEL_GAUGE is not set
    # CONFIG_GPIO_GET_DIRECTION is not set
    # CONFIG_GPIO_GET_CONFIG is not set
    # CONFIG_GPIO_HOGS is not set
    # CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT is not set
    CONFIG_GPIO_NRFX=y
    # CONFIG_HWINFO is not set
    # CONFIG_I2C_CALLBACK is not set
    # CONFIG_I2C_TARGET is not set
    CONFIG_I2C_NRFX=y
    CONFIG_I2C_NRFX_TRANSFER_TIMEOUT=500
    CONFIG_I2C_1_NRF_TWIM=y
    CONFIG_I2C_TCA954X=y
    CONFIG_I2C_TCA954X_ROOT_INIT_PRIO=50
    CONFIG_I2C_TCA954X_CHANNEL_INIT_PRIO=50
    CONFIG_I2C_INIT_PRIORITY=50
    # CONFIG_I2S is not set
    # CONFIG_I3C is not set
    # CONFIG_SMBUS is not set
    
    #
    # Interrupt controller drivers
    #
    CONFIG_INTC_INIT_PRIORITY=40
    # CONFIG_MULTI_LEVEL_INTERRUPTS is not set
    # CONFIG_INTC_ESP32 is not set
    # end of Interrupt controller drivers
    
    # CONFIG_IPM is not set
    # CONFIG_LED is not set
    # CONFIG_LED_STRIP is not set
    # CONFIG_LORA is not set
    # CONFIG_MBOX is not set
    # CONFIG_MDIO is not set
    # CONFIG_MIPI_DSI is not set
    
    #
    # Miscellaneous Drivers
    #
    # CONFIG_GROVE_LCD_RGB is not set
    # end of Miscellaneous Drivers
    
    # CONFIG_MM_DRV is not set
    # CONFIG_NEURAL_NET_ACCEL is not set
    # CONFIG_PCIE is not set
    # CONFIG_PCIE_ENDPOINT is not set
    # CONFIG_PECI is not set
    CONFIG_PINCTRL_STORE_REG=y
    # CONFIG_PINCTRL_DYNAMIC is not set
    CONFIG_PINCTRL_NRF=y
    # CONFIG_PM_CPU_OPS is not set
    # CONFIG_POWER_DOMAIN is not set
    # CONFIG_PS2 is not set
    # CONFIG_PTP_CLOCK is not set
    # CONFIG_PWM is not set
    # CONFIG_RETAINED_MEM is not set
    # CONFIG_RTC is not set
    # CONFIG_SDHC is not set
    # CONFIG_SYSCON is not set
    
    #
    # Timer drivers
    #
    # CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is not set
    # CONFIG_SYSTEM_CLOCK_SLOPPY_IDLE is not set
    CONFIG_SYSTEM_CLOCK_INIT_PRIORITY=0
    CONFIG_TICKLESS_CAPABLE=y
    CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT=y
    # CONFIG_NRF_RTC_TIMER_TRIGGER_OVERFLOW is not set
    # CONFIG_SYSTEM_CLOCK_NO_WAIT is not set
    # CONFIG_SYSTEM_CLOCK_WAIT_FOR_AVAILABILITY is not set
    CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY=y
    # end of Timer drivers
    
    # CONFIG_USB_BC12 is not set
    # CONFIG_UDC_DRIVER is not set
    # CONFIG_UVB is not set
    # CONFIG_USB_DEVICE_DRIVER is not set
    # CONFIG_USBC_TCPC_DRIVER is not set
    # CONFIG_USBC_VBUS_DRIVER is not set
    # CONFIG_VIDEO is not set
    # CONFIG_VIRTUALIZATION is not set
    # CONFIG_W1 is not set
    # end of Device Drivers
    
    #
    # C Library
    #
    CONFIG_SUPPORT_MINIMAL_LIBC=y
    CONFIG_PICOLIBC_SUPPORTED=y
    CONFIG_MINIMAL_LIBC=y
    # CONFIG_PICOLIBC is not set
    # CONFIG_NEWLIB_LIBC is not set
    # CONFIG_EXTERNAL_LIBC is not set
    CONFIG_HAS_NEWLIB_LIBC_NANO=y
    CONFIG_MINIMAL_LIBC_NON_REENTRANT_FUNCTIONS=y
    CONFIG_MINIMAL_LIBC_MALLOC=y
    CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE=0
    CONFIG_MINIMAL_LIBC_CALLOC=y
    CONFIG_MINIMAL_LIBC_REALLOCARRAY=y
    # CONFIG_MINIMAL_LIBC_LL_PRINTF is not set
    # CONFIG_MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE is not set
    # CONFIG_MINIMAL_LIBC_RAND is not set
    CONFIG_MINIMAL_LIBC_TIME=y
    # CONFIG_MINIMAL_LIBC_STRING_ERROR_TABLE is not set
    CONFIG_NEED_LIBC_MEM_PARTITION=y
    # end of C Library
    
    #
    # C++ Language Support
    #
    # CONFIG_CPP is not set
    
    #
    # Deprecated
    #
    # CONFIG_CPLUSPLUS is not set
    # CONFIG_LIB_CPLUSPLUS is not set
    # end of Deprecated
    # end of C++ Language Support
    
    #
    # Additional libraries
    #
    
    #
    # Hash Function Support
    #
    # CONFIG_SYS_HASH_FUNC32 is not set
    # end of Hash Function Support
    
    #
    # Hashmap (Hash Table) Support
    #
    # CONFIG_SYS_HASH_MAP is not set
    # end of Hashmap (Hash Table) Support
    
    #
    # OS Support Library
    #
    # CONFIG_JSON_LIBRARY is not set
    # CONFIG_RING_BUFFER is not set
    CONFIG_NOTIFY=y
    # CONFIG_BASE64 is not set
    CONFIG_CRC=y
    # CONFIG_PRINTK_SYNC is not set
    # CONFIG_MPSC_PBUF is not set
    CONFIG_ONOFF=y
    # CONFIG_SPSC_PBUF is not set
    # CONFIG_SHARED_MULTI_HEAP is not set
    # CONFIG_WINSTREAM is not set
    # CONFIG_REBOOT is not set
    # CONFIG_UTF8 is not set
    CONFIG_CBPRINTF_COMPLETE=y
    # CONFIG_CBPRINTF_NANO is not set
    CONFIG_CBPRINTF_FULL_INTEGRAL=y
    # CONFIG_CBPRINTF_REDUCED_INTEGRAL is not set
    # CONFIG_CBPRINTF_FP_SUPPORT is not set
    # CONFIG_CBPRINTF_FP_A_SUPPORT is not set
    # CONFIG_CBPRINTF_FP_ALWAYS_A is not set
    CONFIG_CBPRINTF_N_SPECIFIER=y
    # CONFIG_CBPRINTF_LIBC_SUBSTS is not set
    # CONFIG_CBPRINTF_PACKAGE_LONGDOUBLE is not set
    # CONFIG_CBPRINTF_STATIC_PACKAGE_CHECK_ALIGNMENT is not set
    
    #
    # Heap and Memory Allocation
    #
    # CONFIG_SYS_HEAP_VALIDATE is not set
    CONFIG_SYS_HEAP_ALLOC_LOOPS=3
    # CONFIG_SYS_HEAP_RUNTIME_STATS is not set
    # CONFIG_SYS_HEAP_LISTENER is not set
    # CONFIG_SYS_HEAP_SMALL_ONLY is not set
    # CONFIG_SYS_HEAP_BIG_ONLY is not set
    CONFIG_SYS_HEAP_AUTO=y
    # CONFIG_SYS_MEM_BLOCKS is not set
    # end of Heap and Memory Allocation
    # end of OS Support Library
    
    # CONFIG_POSIX_API is not set
    # CONFIG_POSIX_CLOCK is not set
    CONFIG_MAX_TIMER_COUNT=5
    CONFIG_TIMER_CREATE_WAIT=100
    # CONFIG_POSIX_MQUEUE is not set
    # CONFIG_EVENTFD is not set
    # CONFIG_FNMATCH is not set
    # CONFIG_OPENAMP_RSC_TABLE is not set
    # CONFIG_SMF is not set
    # end of Additional libraries
    
    #
    # Subsystems and OS Services
    #
    # CONFIG_BT is not set
    
    #
    # Controller Area Network (CAN) bus subsystem
    #
    # CONFIG_ISOTP is not set
    # end of Controller Area Network (CAN) bus subsystem
    
    # CONFIG_CONSOLE_SUBSYS is not set
    
    #
    # System Monitoring Options
    #
    # CONFIG_THREAD_ANALYZER is not set
    # end of System Monitoring Options
    
    #
    # Debugging Options
    #
    # CONFIG_DEBUG is not set
    # CONFIG_STACK_USAGE is not set
    # CONFIG_STACK_SENTINEL is not set
    CONFIG_PRINTK=y
    CONFIG_EARLY_CONSOLE=y
    # CONFIG_ASSERT is not set
    # CONFIG_FORCE_NO_ASSERT is not set
    CONFIG_ASSERT_VERBOSE=y
    # CONFIG_ASSERT_NO_FILE_INFO is not set
    # CONFIG_ASSERT_NO_COND_INFO is not set
    # CONFIG_ASSERT_NO_MSG_INFO is not set
    # CONFIG_ASSERT_TEST is not set
    # CONFIG_OVERRIDE_FRAME_POINTER_DEFAULT is not set
    # CONFIG_DEBUG_INFO is not set
    CONFIG_DEBUG_THREAD_INFO=y
    # CONFIG_DEBUG_COREDUMP is not set
    # end of Debugging Options
    
    # CONFIG_DISK_ACCESS is not set
    # CONFIG_DSP is not set
    # CONFIG_EMUL is not set
    # CONFIG_CHARACTER_FRAMEBUFFER is not set
    
    #
    # File Systems
    #
    # CONFIG_FILE_SYSTEM is not set
    # CONFIG_NVS is not set
    # end of File Systems
    
    #
    # Inter Processor Communication
    #
    # CONFIG_RPMSG_SERVICE is not set
    # CONFIG_IPC_SERVICE is not set
    # end of Inter Processor Communication
    
    # CONFIG_JWT is not set
    
    #
    # Logging
    #
    # CONFIG_LOG is not set
    # CONFIG_LOG_OUTPUT is not set
    # end of Logging
    
    #
    # Device Management
    #
    
    #
    # Host command handler subsystem
    #
    # CONFIG_EC_HOST_CMD is not set
    # CONFIG_EC_HOST_CMD_BACKEND_SHI is not set
    # end of Host command handler subsystem
    
    # CONFIG_OSDP is not set
    # end of Device Management
    
    # CONFIG_MODBUS is not set
    
    #
    # Networking
    #
    # CONFIG_NET_BUF is not set
    # CONFIG_NETWORKING is not set
    # end of Networking
    
    #
    # Power Management
    #
    # CONFIG_PM_S2RAM is not set
    CONFIG_PM_POLICY_DEFAULT=y
    # CONFIG_PM_POLICY_CUSTOM is not set
    # end of Power Management
    
    #
    # Portability
    #
    # end of Portability
    
    #
    # Random Number Generators
    #
    # CONFIG_TEST_RANDOM_GENERATOR is not set
    # end of Random Number Generators
    
    # CONFIG_RTIO is not set
    
    #
    # SD
    #
    # CONFIG_MMC_STACK is not set
    # CONFIG_SDMMC_STACK is not set
    # CONFIG_SDIO_STACK is not set
    # end of SD
    
    # CONFIG_SETTINGS is not set
    # CONFIG_SHELL is not set
    # CONFIG_STATS is not set
    
    #
    # Storage
    #
    # CONFIG_STREAM_FLASH is not set
    # end of Storage
    
    # CONFIG_TASK_WDT is not set
    
    #
    # Testing
    #
    # CONFIG_ZTEST is not set
    # CONFIG_ZTEST_MOCKING is not set
    # CONFIG_ZTRESS is not set
    # CONFIG_TEST is not set
    CONFIG_COVERAGE_GCOV_HEAP_SIZE=16384
    # CONFIG_TEST_USERSPACE is not set
    # end of Testing
    
    # CONFIG_TIMING_FUNCTIONS is not set
    # CONFIG_TRACING is not set
    # CONFIG_USB_DEVICE_STACK is not set
    # CONFIG_USB_DEVICE_STACK_NEXT is not set
    # CONFIG_USB_HOST_STACK is not set
    # CONFIG_USBC_STACK is not set
    # CONFIG_ZBUS is not set
    # end of Subsystems and OS Services
    
    CONFIG_TOOLCHAIN_ZEPHYR_0_16=y
    CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE=y
    
    #
    # Build and Link Features
    #
    
    #
    # Linker Options
    #
    # CONFIG_LINKER_ORPHAN_SECTION_PLACE is not set
    CONFIG_LINKER_ORPHAN_SECTION_WARN=y
    # CONFIG_LINKER_ORPHAN_SECTION_ERROR is not set
    CONFIG_HAS_FLASH_LOAD_OFFSET=y
    # CONFIG_USE_DT_CODE_PARTITION is not set
    CONFIG_FLASH_LOAD_OFFSET=0
    CONFIG_FLASH_LOAD_SIZE=0
    CONFIG_LD_LINKER_SCRIPT_SUPPORTED=y
    CONFIG_LD_LINKER_TEMPLATE=y
    # CONFIG_CMAKE_LINKER_GENERATOR is not set
    # CONFIG_HAVE_CUSTOM_LINKER_SCRIPT is not set
    CONFIG_KERNEL_ENTRY="__start"
    CONFIG_LINKER_SORT_BY_ALIGNMENT=y
    CONFIG_SRAM_OFFSET=0
    
    #
    # Linker Sections
    #
    # CONFIG_LINKER_USE_BOOT_SECTION is not set
    # CONFIG_LINKER_USE_PINNED_SECTION is not set
    CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT=y
    CONFIG_LINKER_LAST_SECTION_ID=y
    CONFIG_LINKER_LAST_SECTION_ID_PATTERN=0xE015E015
    CONFIG_LINKER_USE_RELAX=y
    # end of Linker Sections
    # end of Linker Options
    
    #
    # Compiler Options
    #
    # CONFIG_CODING_GUIDELINE_CHECK is not set
    # CONFIG_NATIVE_APPLICATION is not set
    CONFIG_COMPILER_FREESTANDING=y
    # CONFIG_SIZE_OPTIMIZATIONS is not set
    # CONFIG_SPEED_OPTIMIZATIONS is not set
    CONFIG_DEBUG_OPTIMIZATIONS=y
    # CONFIG_NO_OPTIMIZATIONS is not set
    # CONFIG_COMPILER_WARNINGS_AS_ERRORS is not set
    # CONFIG_COMPILER_SAVE_TEMPS is not set
    CONFIG_COMPILER_COLOR_DIAGNOSTICS=y
    CONFIG_FORTIFY_SOURCE_NONE=y
    # CONFIG_FORTIFY_SOURCE_COMPILE_TIME is not set
    # CONFIG_FORTIFY_SOURCE_RUN_TIME is not set
    CONFIG_COMPILER_OPT=""
    # CONFIG_MISRA_SANE is not set
    # end of Compiler Options
    
    # CONFIG_ASSERT_ON_ERRORS is not set
    # CONFIG_NO_RUNTIME_CHECKS is not set
    CONFIG_RUNTIME_ERROR_CHECKS=y
    
    #
    # Build Options
    #
    CONFIG_KERNEL_BIN_NAME="zephyr"
    CONFIG_OUTPUT_STAT=y
    # CONFIG_OUTPUT_SYMBOLS is not set
    CONFIG_OUTPUT_DISASSEMBLY=y
    # CONFIG_OUTPUT_DISASSEMBLE_ALL is not set
    CONFIG_OUTPUT_PRINT_MEMORY_USAGE=y
    # CONFIG_CLEANUP_INTERMEDIATE_FILES is not set
    # CONFIG_BUILD_NO_GAP_FILL is not set
    CONFIG_BUILD_OUTPUT_BIN=y
    # CONFIG_BUILD_OUTPUT_EXE is not set
    # CONFIG_BUILD_OUTPUT_S19 is not set
    # CONFIG_BUILD_OUTPUT_UF2 is not set
    # CONFIG_BUILD_OUTPUT_STRIPPED is not set
    # CONFIG_APPLICATION_DEFINED_SYSCALL is not set
    # CONFIG_MAKEFILE_EXPORTS is not set
    # CONFIG_BUILD_OUTPUT_META is not set
    CONFIG_BUILD_OUTPUT_STRIP_PATHS=y
    # end of Build Options
    
    CONFIG_WARN_DEPRECATED=y
    CONFIG_ENFORCE_ZEPHYR_STDINT=y
    # end of Build and Link Features
    
    #
    # Boot Options
    #
    # CONFIG_IS_BOOTLOADER is not set
    # CONFIG_BOOTLOADER_BOSSA is not set
    # end of Boot Options
    
    #
    # Compatibility
    #
    CONFIG_COMPAT_INCLUDES=y
    # end of Compatibility
    

    blinkysupreme-build.zip

  • Hi James

    Thanks for sharing the files, unfortunately there isn't anything that immediately jumps out at me...

    Regarding the crystal pins there is a remaining issue that might be relevant, causing the TF-M firmware to ignore the LF clock configuration and set these pins regardless of the setting.  
    In order to see if this is the problem, could you try to comment out lines 787 and 788 in modules/tee/tf-m/trusted-firmware-m/platform/ext/target/nordic_nrf/common/nrf5340/target_cfg.c?

    nrf_gpio_pin_control_select(PIN_XL1, NRF_GPIO_PIN_SEL_PERIPHERAL);
    nrf_gpio_pin_control_select(PIN_XL2, NRF_GPIO_PIN_SEL_PERIPHERAL);

    A similar issue was found for the NFC pins, but this issue has been fixed in v2.4.0 of the SDK so it is odd that it would still show up. 

    This older case discuses the issue in more detail. 

    Could you try to read out the register as mentioned in that case to see if the NFCPINS register in the UICR gets configured correctly?

    nrfjprog --memrd 0xff8028

    Best regards
    Torbjørn

  • Hi Torbjorn,

    Thanks again for your help and patience. I was able to get P0.2, P0.3 (NFC pins) and P0.19 working. I think I was inconsistent earlier in opening VSCode through the provided Nordic tool which caused me to sometimes use SDK 2.1.0. This would make P0.2, P0.3 and oddly P0.19 to not work. I don't know why pin 19 did not work on SDK 2.1.0 as it should be a normal pin. Regardless, these pins now work.

    Unfortunately, pins P0.0 and P0.1 (crystal pins) still do not work and they don't work even after commenting out those lines of code. Hopefully there's something else I can try. Just to confirm, you're able to blink these pins on your side, correct?

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