nRF5340 QSPI flash

Hi:

SW: NCS v2.5.0

HW: nRF5340 + flash gd25q256e 

To reduce the power consumption of the QSPI flash, we have two approaches.

1. cut off the QSPI flash's power when the product is in sleep mode (the power can be turned on/off by an LDO)

2. always keep the power of the QSPI flash, and put the flash into deep power down mode when the product is in sleep mode.

unfortunately, both of these two approaches have problems.

for approach 1, when turning on the power again, and initiating the QSPI and XIP again, the XIP doesn't work.

e.g 

 printk("#2Address of %x value %x\n", 0x10000008, *(uint32_t *)0x10000008);
 printk("#2Address of %x value %x\n", 0x10000040, *(uint32_t *)0x10000040);
 the values are wrong. 
for approach 2,
put the QSPI flash into deep power down mode by calling pm_device_action_run(flash_dev, PM_DEVICE_ACTION_SUSPEND);
this works, we can see the power consumption is reduced.
wake up the flash from deep power down mode by calling pm_device_action_run(flash_dev, PM_DEVICE_ACTION_RESUME);
but this function return -EIO, and it is caused by the nrfx_qspi_init return NRFX_ERROR_TIMEOUT.
if we don't put the flash into deep power-down mode, every thing is OK.

below is the QSPI configuration 

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	gd25q256: gd25q256e@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* GD25Q256 supports only pp(cmd 02H) and pp4o(cmd 32H) */
		writeoc = "pp4o";
		/* GD25Q256 supports all readoc options */
		readoc = "read4io";
		sck-frequency = <8000000>;
		jedec-id = [c8 40 19];
		sfdp-bfp = [/*read the sfdp-bfp by jesd216 sample(zephyr\samples\drivers\jesd216)*/
			e5 20 f3 ff  ff ff ff 0f  44 eb 08 6b  08 3b 42 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  d6 39 a5 fe  83 1f 15 51  ec 62 16 33
			7a 75 7a 75  04 bd d5 5c  00 06 64 00  08 50 00 01
		];
		size = <268435456>;
		has-dpd;
		t-enter-dpd = <40000>;
		t-exit-dpd = <45000>;
		enter-4byte-addr = <0x01>;
		address-size-32;
	};
};

Do you have any ideas on this issue?

Thanks!

Parents
  • Hi,

    I recommend you have a look at this modified version of the code relocation sample you're using. In this sample XiP is disabled after use and enabled before use. The same API is called to enable and disable XIP.

    The sample loops with a 10 sec sleep. The test write/read/erase code runs from XIP. A thread runs XIP code continuously.

    xip_write_run_disable_feat_xip_thread.zip

    Kind regards,
    Andreas

  • Hi,

    Thanks for your sample code.

    I simplified this sample code as below 

    #include <zephyr/kernel.h>
    #include <zephyr/sys/printk.h>
    #include <zephyr/pm/device.h>
    #include <stdint.h>
    #include <zephyr/kernel.h>
    #include <soc.h>
    #include <zephyr/pm/device.h>
    #include <zephyr/device.h>
    #include <zephyr/devicetree.h>
    #include <stdio.h>
    #include <string.h>
    #include <nrfx_qspi.h>
    #include <zephyr/drivers/flash/nrf_qspi_nor.h>
    #include <hal/nrf_gpio.h>
    #include <nrfx_gpiote.h>
    
    #define LDO_3V0_EN_PIN (32 + 12)
    
    #define TEST_DEEP_SLEEP_MODE 0
    int main(void)
    {
    	static const struct device *flash_dev;
    
    	printk("Hello World! %s\n", CONFIG_BOARD);
    	nrf_gpio_cfg_output(LDO_3V0_EN_PIN);
    	nrf_gpio_pin_set(LDO_3V0_EN_PIN); // turn on the flash's VDD
    	flash_dev = DEVICE_DT_GET(DT_ALIAS(spi_flash0));
    
    	nrf_qspi_nor_xip_enable(flash_dev, true);
    	/*read QSPI data by XIP, no problem, the value is correct*/
    	printk("#0Address of %x value %x\n", 0x10000008, *(uint32_t *)0x10000008);
    	printk("#1Address of %x value %x\n", 0x10000030, *(uint32_t *)0x10000030);
    
    	int cnt = 0;
    #if TEST_DEEP_SLEEP_MODE
    	while (1)
    	{
    		printk("cnt %d\n", cnt++);
    		nrf_qspi_nor_xip_enable(flash_dev, false);
    		/*put QSPI flash into deep-power-down mode, no problem*/
    		ret = pm_device_action_run(flash_dev, PM_DEVICE_ACTION_SUSPEND);
    		printf("PM_DEVICE_ACTION_SUSPEND ret = %d\n", ret);
    
    		k_msleep(2000);
    
    		/*wake up QSPI flash from deep-power-down mode, has problem,
    		pm_device_action_run return -EIO, and it is caused by the nrfx_qspi_init return NRFX_ERROR_TIMEOUT.*/
    		ret = pm_device_action_run(flash_dev, PM_DEVICE_ACTION_RESUME);
    		printf("PM_DEVICE_ACTION_RESUME ret = %d\n", ret);
    		nrf_qspi_nor_xip_enable(flash_dev, true);
    
    		printk("#0Address of %x value %x\n", 0x10000008, *(uint32_t *)0x10000008);
    		printk("#1Address of %x value %x\n", 0x10000030, *(uint32_t *)0x10000030);
    
    		k_msleep(2000);
    	}
    #else
    	while (1)
    	{
    		printk("cnt %d\n", cnt++);
    		nrf_qspi_nor_xip_enable(flash_dev, false);
    		k_msleep(10);
    		nrf_gpio_pin_clear(LDO_3V0_EN_PIN); // turn off the flash's VDD
    
    		k_msleep(2000);
    
    		nrf_gpio_pin_set(LDO_3V0_EN_PIN); // turn on the flash's VDD
    		k_msleep(10);
    		nrf_qspi_nor_xip_enable(flash_dev, true);
    
    		/*read QSPI data by XIP, has problem, the value is wrong*/
    		printk("#0Address of %x value %x\n", 0x10000008, *(uint32_t *)0x10000008);
    		printk("#1Address of %x value %x\n", 0x10000030, *(uint32_t *)0x10000030);
    
    		k_msleep(2000);
    	}
    #endif
    	return 0;
    }

    this sample code works on the nrf5340-DK but still has the same problem on my custom board, please see the comments on the source code.

    the difference is that my custom board uses a different QSPI flash(gd25q256e).

    I have two questions.

    1. cut off the QSPI flash's power when the product is in sleep mode (the power can be turned on/off by an LDO)

    Why the XIP doesn't work correctly after turning on the flash's VDD again?

    2. always keep the power of the QSPI flash, and put the flash into deep power down mode when the product is in sleep mode.

    Why the the nrfx_qspi_init return NRFX_ERROR_TIMEOUT after the flash in deep-power-down mode?

  • Oh okay. Could the function  pm_device_action_run work without that configuration enabled?

  • update a finding.

    Some PCBAs can wake up from deep-power-down mode, some can not, and some have a chance to wake up from deep-power-down mode.

    yes, as I mentioned, it seems to be related to the HW, but here's what I don't understand is that the error occurs when initiating the QSPI peripheral of Nordic MCU instead of sending the wakeup CMD to the flash. so we can not say this relate to the HW from this view point.

  • Hi Jason, 

    Have a look at  RE: QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE? 

    After calling nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE) the QSPI peripheral will try to read the status register of the external flash. 

    In the above mentioned ticket there's a hack provided. Let me know if it works for you. 

    Thanks,

    Rosh

  • Hi roshangeoroy,

    I do not quite understand how to implement this ‘’hack' , could you provide an example?

    After calling nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE) the QSPI peripheral will try to read the status register of the external flash

    do you mean this is done by the QSPI peripheral automatically? I don't see any code to read the status.

  • Hi AHaug,

    sorry for the late relay, because I was handling another urgent task.

    However, we see that the external flash only supports 2.7V-3.6V, so this might be related to one of these

    I changed the VDD voltage and made no difference.

    Also, the logic analyzer trace Simon requested in the other ticket would likely be very helpful here.

    Release from Deep Power-Down on nrf5340 DK and no problem 

    Release from Deep Power-Down on our PCBA with gd25q256e  fash,  return error, and always outputs the below waveform, no stop.

    According to the logic analyzer, it seems to be due to the flash doesn't respond to the 05H cmd.

    my question is why did the nrf5340 send the 05H cmd before sending the ABH cmd, why not just send the ABH cmd to Release from Deep-Power-Down.

    According to the FLASH datasheet,  "Once the device has entered the Deep Power-Down Mode, all commands are ignored except the Release from
    Deep Power-Down and Read Device ID (RDI) (ABH) or Enable Reset (66H) and Reset (99H) commands."

Reply
  • Hi AHaug,

    sorry for the late relay, because I was handling another urgent task.

    However, we see that the external flash only supports 2.7V-3.6V, so this might be related to one of these

    I changed the VDD voltage and made no difference.

    Also, the logic analyzer trace Simon requested in the other ticket would likely be very helpful here.

    Release from Deep Power-Down on nrf5340 DK and no problem 

    Release from Deep Power-Down on our PCBA with gd25q256e  fash,  return error, and always outputs the below waveform, no stop.

    According to the logic analyzer, it seems to be due to the flash doesn't respond to the 05H cmd.

    my question is why did the nrf5340 send the 05H cmd before sending the ABH cmd, why not just send the ABH cmd to Release from Deep-Power-Down.

    According to the FLASH datasheet,  "Once the device has entered the Deep Power-Down Mode, all commands are ignored except the Release from
    Deep Power-Down and Read Device ID (RDI) (ABH) or Enable Reset (66H) and Reset (99H) commands."

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