low power wearable electronics.

[LoPow@]

I have designed single layer pcb for the first time using kiCAD software for  low power (1-5mW) wearable electronics using nRF52840,one accelerometer sensor i.e.BMA400,one recommended antenna(AN91445) and one 2x5 programming port. Please refer to the attached the document. Please suggest any correction and a suitable program/code so that we can test it using ARM Segger Studio.Low power basic Reference.pdfLow power basic1.0.csv

[JONATHAN LL]

Hi LoPow@ ,
The cost saving is not worth it in this case. The performance will be terrible and not representative of a two(multi) layered design so it will not be representable of the final product. 

So this is not recommended. Pleas follow the reference layout to achieve good results. Failing to follow the design guidelines can result in a non working device. 

The center pad of the SoC needs to be connected to the rest of the ground for the radio to work as intended. 

Also the antenna you have used is degined to have a ground plane also. So it might not work at all as it is in your current desing.


https://www.infineon.com/dgdl/Infineon-AN91445_Antenna_Design_and_RF_Layout_Guidelines-ApplicationNotes-v09_00-EN.pdf?fileId=8ac78c8c7cdc391c017d073e054f6227 

Regards,
Jonathan

[LoPow@]

This is the updated version of Low Power Wearable Electronics.Please check it and suggest corrections....

[LoPow@]

Is there any reason for this, that all critical components should be close to the chip....?

[JONATHAN LL]

Hi LoPow@ , did you mix up what ticket you replied to? Was this where you intended to update  https://devzone.nordicsemi.com/support/310814 ? 

LoPow@ said:

Is there any reason for this, that all critical components should be close to the chip....?

Yes, it is important to follow the layout recommendations. Deviation from can cause unexpected issues. Like reduced RF performance and it could also effect the devices stability making it more prone to be effected by external EMI. 

Regards,
Jonathan

[LoPow@]

Please reffer the attached documents........As per your suggestions,I have made changes.....Please check it and suggest corrections.....

_autosave-tanvi_updated- reference.pdfLow power final.csv

[LoPow@]

In your reference schematic,there will be a resistor R1 which is connected to the VBus.and value of R1 will be 2R2 as per your schematic.....Can you tell me what is the actual value of R1 resistor?

[JONATHAN LL]

Hi,

Pardon the slow response. 


The layout is still not ideal, all the light blue area marked in the drawing under needs to be removed, no GND plane in that section. 
All the dark Blue area should be connected to GND plane on top layer. The Dark circle you need to add a matching network. Ideally a pi network but a single shunt is minimum. 



Second layer, the light blue are needs to be a single continues GND plane. 

LoPow@ said:

Can you tell me what is the actual value of R1 resistor?

Its optional and specs can be seen here:

The value should be 2.2 Ohm.

Regards,
Jonathan

[LoPow@]

Please ,can you tell me what actually needs to be done in the second layer?

[JONATHAN LL]

The second layer: 

- The section under the RF path, so that is the area from where the nRF52 SoC is and all the way until the antenna. It should either have a solid copper plane, not traces or paths that separate copper sections under that area. 
- Section under the Antenna needs to have a cut out(no copper under the antenna area)

There is some info here in this video from Altium that does show what to do around the antenna. https://youtu.be/2U1ngG5R5Pw?t=659 

Regards,
Jonathan