We are having a slight issue when we are trying to update the DFU. The original version had this setting for the data reserve:
#ifndef DFU_APP_DATA_RESERVED
#define DFU_APP_DATA_RESERVED...
Hello!
I am working with the example mpu interface projects located at the following repo:
github.com/.../nrf5-mpu-examples
After converting the Keil projects to...
I'm using S332 0.9.1 with freertos. nRF52.
BLE and ANT are both active. I would like to run the ANT continuos wave (CW) test after a specific trigger (a command over a console...
I want to encrypt advertisements using aes-ccm peripheral present on the nrf51 board. I am not using softdevice, instead I am generating my own packets and transmitting them...
The RISC-V coprocessor of the nRF54L Series requires a correct setup of the memory layout, for good performance and correct operation of both the application CPU and the FLPR
The nRF54L Series SoCs features a RISC-V coprocessor, enabling efficient, flexible designs with enhanced performance and ultra-low-power wireless connectivity.
